DATASHEET
ISL55110, ISL55111
Dual, High Speed MOSFET Driver
The ISL55110 and ISL55111 are dual high speed MOSFET
drivers intended for applications requiring accurate pulse
generation and buffering. Target applications include
ultrasound, CCD imaging, piezoelectric distance sensing and
clock generation circuits.
With a wide output voltage range and low ON-resistance, these
devices can drive a variety of resistive and capacitive loads
with fast rise and fall times, allowing high-speed operation
with low skew, as required in large CCD array imaging
applications.
The ISL55110, ISL55111 are compatible with 3.3V and 5V
logic families and incorporate tightly controlled input
thresholds to minimize the effect of input rise time on output
pulse width. The ISL55110 has a pair of in-phase drivers while
the ISL55111 has two drivers operating in anti-phase.
ISL55110 and ISL55111 have a power-down mode for low
power consumption during equipment standby times, making
it ideal for portable products.
The ISL55110 and ISL55111 are available in 16 Ld Exposed
pad QFN packaging and 8 Ld TSSOP. Both devices are
specified for operation over the full -40°C to +85°C
temperature range.
FN6228
Rev 8.00
January 29, 2015
Features
• 5V to 12V pulse amplitude
• High current drive 3.5A
• 6ns minimum pulse width
• 1.5ns rise and fall times, 100pF load
• Low skew
• 3.3V and 5V logic compatible
• In-phase (ISL55110) and anti-phase outputs (ISL55111)
• Small QFN and TSSOP packaging
• Low quiescent current
• Pb-free (RoHS compliant)
Applications
• Ultrasound MOSFET driver
• CCD array horizontal driver
• Clock driver circuits
Related Literature
•
AN1283,
“ISL55110_11EVAL1Z, ISL55110_11EVAL2Z
Evaluation Board User's Manual”
ISL55110 AND ISL55111 DUAL DRIVER
o
VDD
VH
o
o
IN-A
OA
o
o
ENABLE-QFN*
o
IN-B
**
OB
o
GND
o
PD
o
*ENABLE AVAILABLE IN QFN PACKAGE ONLY
**ISL55111 IN-B IS INVERTING
FIGURE 1. FUNCTIONAL BLOCK DIAGRAM
FN6228 Rev 8.00
January 29, 2015
Page 1 of 18
ISL55110, ISL55111
Pin Configurations
ISL55110
(16 LD QFN)
TOP VIEW
NC
NC
NC
NC
ISL55111
(16 LD QFN)
TOP VIEW
NC
NC
NC
14
16
12 OB
11 GND
VDD
ENABLE
PD
IN-B
1
2
EP
3
4
5
IN-A
6
NC
7
NC
8
NC
15
NC
13
12 OB
11
GND
10 VH
9
OA
8 OB
7 GND
6 VH
5
OA
16
VDD
ENABLE
PD
IN-B
1
2
15
14
13
EP
3
4
5
IN-A
6
NC
7
NC
8
NC
10 VH
9
OA
ISL55110
(8 LD TSSOP)
TOP VIEW
VDD
PD
IN-B
IN-A
1
2
3
4
8 OB
7 GND
6 VH
5
OA
VDD
PD
IN-B
IN-A
1
2
3
4
ISL55111
(8 LD TSSOP)
TOP VIEW
Pin Descriptions
16 LD QFN
1
10
11
3
2
8 LD TSSOP
1
6
7
2
-
PIN
VDD
VH
GND
PD
ENABLE
Logic power.
Driver high rail supply.
Ground, return for both VH rail and VDD logic supply. This is also the potential of the QFN’s exposed
pad (EP).
Power-down. Active logic high places part in power-down mode.
QFN packages only. When the ENABLE pin is low, the device will operate normally (outputs controlled
by the inputs). When the ENABLE pin is tied high, the output will be tri-stated. In other words, it will
act as if it is open or floating regardless of what is on the IN-x pins. This provides high-speed enable
control over the driver outputs.
Logic level input that drives OA to VH rail or ground. Not inverted.
Logic level input that drives OB to VH rail or ground. Not inverted on ISL55110, inverted on ISL55111.
Driver output related to IN-A.
Driver output related to IN-B.
No internal connection.
Exposed thermal pad. Connect to GND and follow good thermal pad layout guidelines.
FUNCTION
5
4
9
12
6, 7, 8, 13, 14,
15, 16
EP
4
3
5
8
-
-
IN-A
IN-B, IN-B
OA
OB
NC
EP
FN6228 Rev 8.00
January 29, 2015
Page 2 of 18
ISL55110, ISL55111
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL55110IRZ
ISL55110IVZ
ISL55111IRZ
ISL55111IVZ
ISL55110EVAL1Z
ISL55110EVAL2Z
ISL55111EVAL1Z
ISL55111EVAL2Z
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL55110, ISL55111.
For more information on MSL please see techbrief
TB363.
PART
MARKING
55110IRZ
55110 IVZ
55111IRZ
55111 IVZ
TSSOP Evaluation Board
QFN Evaluation Board
TSSOP Evaluation Board
QFN Evaluation Board
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
16 Ld QFN
8 Ld TSSOP
16 Ld QFN
8 Ld TSSOP
PKG.
DWG. #
L16.4x4A
M8.173
L16.4x4A
M8.173
FN6228 Rev 8.00
January 29, 2015
Page 3 of 18
ISL55110, ISL55111
Absolute Maximum Ratings
(T
A
= +25°C)
V
H
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.0V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V
VIN-A, VIN-B, PD, ENABLE . . . . . . . . . . . . . . . . (GND - 0.5V) to (V
DD
+ 0.5V)
OA, OB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.5) to (VH + 0.5V)
Maximum Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
16 Ld (4x4) QFN Package (Notes
5, 6)
. . .
45
3.0
8 Ld TSSOP Package (Notes
4, 7)
. . . . . . .
140
46
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Drive Supply Voltage (V
H
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 13.2V
Logic Supply Voltage (V
DD)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Ambient Temperature (T
A
) . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
5.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
6. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
7. For
JC
, the “case temp” location is taken at the package top center.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
PARAMETER
LOGIC CHARACTERISTICS
VIX_LH
VIX_HL
VHYS
VIH
VIL
VIH
VIL
IIX_H
IIX_L
II_H
II_L
II_H
II_L
r
DS
I
DC
I
AC
VOH to VOL
V
H
= +12V, V
DD
= 2.7V to 5.5V, T
A
= +25°C, unless otherwise specified.
TEST CONDITIONS
l
IH
= 1µA: VIN-A, VIN-B
l
IL
= 1µA: VIN-A, VIN-B
VIN-A, VIN-B
PD
PD
ENABLE - QFN only
ENABLE - QFN only
VIN-A, VIN-B = VDD
VIN-A, VIN-B = 0V
PD = VDD
PD = 0V
ENABLE = VDD (QFN only)
ENABLE = 0V (QFN only)
OA, OB
Design Intent; verified via
simulation.
OA or OB = “1”, voltage
referenced to GND
3
-25
3
100
3.5
13.2
6
2.0
0
2.0
0
10
10
10
10
MIN
(Note
8)
1.32
1.12
TYP
1.42
1.22
0.2
VDD
0.8
VDD
0.8
20
20
20
15
12
MAX
(Note
8)
1.52
1.32
UNITS
V
V
V
V
V
V
V
nA
nA
nA
nA
µA
nA
Ω
mA
A
V
DESCRIPTION
Logic Input Threshold - Low-to-High
Logic Input Threshold - High-to-Low
Logic Input Hysteresis
Logic Input High Threshold
Logic Input Low Threshold
Logic Input High Threshold
Logic Input Low Threshold
Input Current Logic High
Input Current Logic Low
Input Current Logic High
Input Current Logic Low
Input Current Logic High
Input Current Logic Low
Driver Output Resistance
Driver Output DC Current (>2s)
Peak Output Current
Driver Output Swing Range
DRIVER CHARACTERISTICS
FN6228 Rev 8.00
January 29, 2015
Page 4 of 18
ISL55110, ISL55111
DC Electrical Specifications
PARAMETER
SUPPLY CURRENTS
I
DD
I
DD-PDN
IH
IH_PDN
V
H
= +12V, V
DD
= 2.7V to 5.5V, T
A
= +25°C, unless otherwise specified.
(Continued)
TEST CONDITIONS
PD = Low
PD = High
PD = Low, outputs unloaded
PD = High
MIN
(Note
8)
TYP
4.0
MAX
(Note
8)
6.0
12
15
2.5
UNITS
mA
µA
µA
µA
DESCRIPTION
Logic Supply Quiescent Current
Logic Supply Power-down Current
Driver Supply Quiescent Current
Driver Supply Power-down Current
AC Electrical Specifications
PARAMETER
SWITCHING CHARACTERISTICS
t
R
Driver Rise Time
V
H
= +12V, V
DD
=
+3.6V, T
A
= +25°C, unless otherwise specified.
TEST CONDITIONS
MIN
(Note
8)
TYP
MAX
(Note
8)
UNITS
DESCRIPTION
Figure 2,
OA, OB:
CL = 100pF/1k
10% to 90%, VOH - VOL = 12V
Figure 2,
OA, OB:
CL = 100pF/1k
10% to 90%, VOH - VOL = 12V
Figure 2,
OA, OB: CL = 1nF
10% to 90%, VOH - VOL = 12V
Figure 2,
OA, OB: CL = 1nF
10% to 90%, VOH - VOL = 12V
Figure 3,
load 100pF/1k
1.2
ns
t
F
Driver Fall Time
1.4
ns
t
R
t
F
tpdR
tpdF
tpdR
tpdF
tpdR
tpdF
tSkewR
tSkewF
FMAX
TMIN
PD
EN
PD
DIS
t
EN
t
DIS
Driver Rise Time
Driver Fall Time
Input to Output Propagation Delay
Input to Output Propagation Delay
Input to Output Propagation Delay
Input to Output Propagation Delay
Input to Output Propagation Delay
Input to Output Propagation Delay
Channel-to-Channel tpdR Spread with Same
Loads Both Channels
Channel-to-Channel tpdF Spread with Same
Loads Both Channels
Maximum Operating Frequency
Minimum Pulse Width
Power-down to Power-on Time
Power-on to Power-down Time
Enable time; ENABLE switched high to low.
Disable time; ENABLE switched low to high.
6.2
6.9
10.9
10.7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
Figure 3,
load 330pF
12.8
12.5
Figure 3,
load 680pF
14.5
14.1
Figure 3,
All loads
Figure 3,
All loads
70
6
<0.5
<0.5
650
40
40
40
ns
ns
ns
ns
NOTE:
8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
FN6228 Rev 8.00
January 29, 2015
Page 5 of 18
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