Ordering number : EN6792
LC75814V
CMOS LSI
1/4 Duty General-Purpose
LCD Driver
Overview
The LC75814V is a 1/4 duty general-purpose LCD driver that can be
used for frequency display in electronic tuners under the control of a
microcontroller. The LC75814V can drive an LCD with up to 64
segments directly. The LC75814V can also control up to 4 general-
purpose output ports. Since the LC75814V uses separate power supply
systems for the LCD drive block and the logic block, the LCD driver
block power-supply voltage can be set to any voltage in the range 2.7 to
6.0 volts, regardless of the logic block power-supply voltage.
http://onsemi.com
SSOP30(275mil)
Features
Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 64
segments under serial data control.
Serial data input supports CCB format communication with the
system controller.
Serial data control of the power-saving mode based backup function
and all the segments forced off function
Serial data control of switching between the segment output port and
the general-purpose output port functions
High generality, since display data is displayed directly without
decoder intervention.
Independent VLCD for the LCD driver block (VLCD can be set to any
voltage in the range 2.7 to 6.0 volts, regardless of the logic block
power-supply voltage.)
The INH pin can force the display to the off state.
RC oscillator circuit
Package Dimensions
unit : mm (typ)
9.75
30
5.6
7.6
1
0.65
(0.33)
0.22
0.15
CCB is ON Semiconductor® ’s original format. All addresses are managed
by ON Semiconductor® for this format.
CCB is a registered trademark of Semiconductor Components Industries, LLC.
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of this data sheet.
Semiconductor Components Industries, LLC, 2013
October, 2013
71001TN (OT) No.6792-1/14
0.1
(1.3)
1.5 MAX
0.5
LC75814V
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Symbol
V
DD
max
V
LCD
max
V
IN
1
Input voltage
V
IN
2
V
IN
3
Output voltage
V
OUT
1
V
OUT
2
I
OUT
1
Output current
I
OUT
2
I
OUT
3
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
V
DD
V
LCD
CE, CL, DI, INH
OSC
V
LCD
1, V
LCD
2
OSC
S1 to S16, COM1 to COM4, P1 to P4
S1 to S16
COM1 to COM4
P1 to P4
Ta = 85°C
Conditions
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
–0.3 to V
LCD
+ 0.3
–0.3 to V
DD
+ 0.3
–0.3 to V
LCD
+ 0.3
300
3
5
100
–40 to +85
–55 to +125
Unit
V
V
V
V
V
V
V
µA
mA
mA
mW
°C
°C
Allowable Operating Ranges
at Ta = –40 to +85°C, V
SS
= 0 V
Ratings
Parameter
Supply voltage
Symbol
V
DD
V
LCD
V
LCD
1
V
LCD
2
V
IH
V
IL
R
OSC
C
OSC
f
OSC
t
ds
t
dh
t
cp
t
cs
t
ch
t
øH
t
øL
t
r
t
f
t
c
V
DD
V
LCD
V
LCD
1
V
LCD
2
CE, CL, DI, INH
CE, CL, DI, INH
OSC
OSC
OSC
CL, DI: Figure 2
CL, DI: Figure 2
CE, CL: Figure 2
CE, CL: Figure 2
CE, CL: Figure 2
CL: Figure 2
CL: Figure 2
CE, CL, DI: Figure 2
CE, CL, DI: Figure 2
INH, CE: Figure 3
10
25
160
160
160
160
160
160
160
160
160
0.8 V
DD
0
43
680
50
100
Conditions
min
2.7
2.7
2/3 V
LCD
1/3 V
LCD
typ
max
6.0
6.0
V
LCD
V
LCD
6.0
0.2 V
DD
Unit
V
V
V
V
V
V
kΩ
pF
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
Input voltage
Input high level voltage
Input low level voltage
Recommended external resistance
Recommended external capacitance
Guaranteed oscillation range
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
High level clock pulse width
Low level clock pulse width
Rise time
Fall time
INH switching time
Pin Assignment
VLCD2
VLCD1
COM4
COM3
COM2
COM1
S14
VLCD
OSC
VDD
VSS
S16
S15
INH
CE
CL
DI
LC75814V
P1/S1
P2/S2
P3/S3
P4/S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
Top view
ILC00283
No. 6792-2/14
LC75814V
Electrical Characteristics
for the Allowable Operating Ranges
Ratings
Parameter
Hysteresis
Input high level current
Input low level current
Symbol
V
H
I
IH
I
IL
V
OH
1
Output high level voltage
V
OH
2
V
OH
3
V
OL
1
Output low level voltage
V
OL
2
V
OL
3
V
MID
1
V
MID
2
Output middle level voltage*
1
V
MID
3
V
MID
4
V
MID
5
Oscillator frequency
f
OSC
I
DD
1
I
DD
2
I
LCD
1
Current drain
I
LCD
2
I
LCD
3
Conditions
CE, CL, DI, INH
CE, CL, DI, INH; V
I
= 6.0 V
CE, CL, DI, INH; V
I
= 0 V
S1 to S16; I
O
= –20 µA
COM1 to COM4; I
O
= –100 µA
P1 to P4; I
O
= –1 mA
S1 to S16; I
O
= 20 µA
COM1 to COM4; I
O
= 100 µA
P1 to P4; I
O
= 1 mA
COM1 to COM4; 1/2 bias,
I
O
= ±100 µA
S1 to S16; 1/3 bias,
I
O
= ±20 µA
S1 to S16; 1/3 bias,
I
O
= ±20 µA
COM1 to COM4; 1/3 bias,
I
O
= ±100 µA
COM1 to COM4; 1/3 bias,
I
O
= ±100 µA
OSC; R
OSC
= 43 kΩ, C
OSC
= 680 pF
V
DD
; power saving mode
V
DD
; V
DD
= 6.0 V, output open, fosc = 50 k Hz
V
LCD
; power saving mode
V
LCD
; V
LCD
= 6.0 V, output open
1/2 bias, fosc = 50 k Hz
V
LCD
; V
LCD
= 6.0 V, output open
1/3 bias, fosc = 50 k Hz
100
60
230
1/2 V
LCD
– 0.9
2/3 V
LCD
– 0.9
1/3 V
LCD
– 0.9
2/3 V
LCD
– 0.9
1/3 V
LCD
– 0.9
40
50
–5.0
V
LCD
– 0.9
V
LCD
– 0.9
V
LCD
– 0.9
0.9
0.9
0.9
1/2 V
LCD
+ 0.9
2/3 V
LCD
+ 0.9
1/3 V
LCD
+ 0.9
2/3 V
LCD
+ 0.9
1/3 V
LCD
+ 0.9
60
5
460
5
200
120
min
typ
0.1 V
DD
5.0
max
Unit
V
µA
µA
V
V
V
V
V
V
V
V
V
V
V
kHz
µA
µA
µA
µA
µA
Note:
*1
Excluding the bias voltage generation divider resistors built in the V
LCD
1 and V
LCD
2. (See Figure 1.)
VLCD
VLCD1
To the common segments drivers
VLCD2
Except these resistors
VSS
ILC00269
Figure 1
No. 6792-3/14
LC75814V
1. When CL is stopped at the low level
CE
tøH
CL
VIH
50%
VIL
tr
VIH
VIL
tds
tdh
ILC00270
VIH
VIL
tøL
tf
tcp
tcs
tch
DI
2. When CL is stopped at the high level
CE
tøL
CL
tf
tr
VIH
VIL
tds
tdh
ILC00271
VIH
VIL
tøH
VIH
50%
VIL
tcp
tcs
tch
DI
Figure 2
Block Diagram
S4 / P4
S3 / P3
S2 / P2
S1 / P1
ILC00272
COM4
COM3
COM2
COM1
S16
S15
COMMON
DRIVER
SEGMENT DRIVER & LATCH
INH
CLOCK
GENERATOR
OSC
SHIFT REGISTER
VDD
VLCD
VLCD1
VLCD2
VSS
ADDRESS
DETECTOR
CE
CL
DI
S5
No. 6792-4/14
LC75814V
Pin Functions
Pin
S1/P1 to
S4/P4
S5 to S16
COM1
COM2
COM3
COM4
OSC
CE
CL
DI
Pin No.
1 to 4
5 to 16
17 to 20
Function
Segment outputs for displaying the display data transferred by serial data input. The pins
S1/P1 to S4/P4 can be used as general-purpose output ports when so set up by the
control data.
Common driver outputs.
The frame frequency f
O
is given by: f
O
= (f
OSC
/512) Hz.
Oscillator connection
An oscillator circuit is formed by connecting an external resistor and capacitor to this pin.
Serial data transfer inputs. These pins are
connected to the control microprocessor.
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
Active
I/O
Handling
when unused
Open
—
O
—
O
Open
26
28
29
30
—
H
I/O
V
DD
I
—
GND
INH
27
Display off control input
•INH
= low (V
SS
): Off
S1/P1 to S4/P4 = Low
(These pins are forcibly set to the segment output port function and
fixed at the V
SS
level.)
S5 to S16 = Low (V
SS
),
COM1 to COM4 = Low (V
SS
)
•INH
= high (V
DD
): On
Note that serial data transfers can be performed when the
display is forced off by this pin.
Used to apply the LCD drive 2/3 bias voltage externally. This pin must be connected to
V
LCD
2 when 1/2 bias drive is used.
Used to apply the LCD drive 1/3 bias voltage externally. This pin must be connected to
V
LCD
1 when 1/2 bias drive is used.
Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V.
LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V.
Ground pin. Connect to ground.
L
I
GND
V
LCD
1
V
LCD
2
V
DD
V
LCD
V
SS
23
—
I
Open
24
21
22
25
—
—
—
—
I
—
—
—
Open
—
—
—
Serial Data Transfer Format
1. When CL is stopped at the low level
CE
CL
DI
1
1
1
1
0
0
1
0
D1
D2 D3
D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 0
P0 P1 P2 DR SC BU 0
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
Display data
32 bits
Control data
7 bits
DD
1 bit
1
1
1
1
0
0
1
0
D33 D34 D35
D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
Display data
32 bits
Fixed data
7 bits
DD
1 bit
ILC00273
Note: DD ... Direction data
No. 6792-5/14
嵌入式系统
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