Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Soldering Temperature (reflow) ......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +3.0V, C
DVREG
= 10µF, V
AGND
= V
DGND
= 0V, common-mode input voltage = V
AVDD
/2, V
REFBP
= V
REFA
= V
REFB
= V
REFC
= V
REFD
= +2.5V (external reference), V
REFDAC
= V
REFDACH
= +1.25V (external reference), V
REFDACL
=
0V, C
REFBP
= C
REFA
= C
REFB
= C
REFC
= C
REFD
= C
REFDAC
= 1µF, f
SCLK
= 38.4MHz, f
EXCLK
= 38.4MHz (external clock applied to
OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through
a series 150Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. DIFF = 1. T
A
= T
MIN
to T
MAX
, unless otherwise noted
(Note 1). Typical values are at T
A
= +25°C.)
PARAMETER
SIGMA-DELTA ADC
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset-Error Drift
Gain Error
Gain Temperature Coefficient
Channel Gain-Error Matching
Channel Offset Matching
Maximum Full-Scale Input
Input-Referred Noise Spectral
Density
Second Harmonic to
Fundamental
Third Harmonic to Fundamental
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Channel Phase Matching
SFDR
Unused channels are shorted and
unconnected
Between all channels, including complete
analog signal path
Complete analog signal path
Complete analog signal path
ADC modulator gain = 1
100kHz
-80
-80
77
85
-0.25
-60
1.2
85
-93
-110
93
108
-0.05
+0.05
GE
Trimmed with 150Ω/330pF anti-alias filter
-1
±50
+0.25
+60
N
INL
DNL
OE
Guaranteed monotonic
16
-16
-1
-35
±30
+1
±2
+1
+35
Bits
LSB
LSB
mV
µV/°C
%
ppm/°C
%
mV
V
P-P
nV/√Hz
dB
dB
dB
dB
Degrees
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE (PGA Disabled, PGA Gain = 1 x (25kHz -1dB Full-Scale Signal))
2
Maxim Integrated
MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= +3.0V to +3.6V, V
DVDD
= +3.0V, C
DVREG
= 10µF, V
AGND
= V
DGND
= 0V, common-mode input voltage = V
AVDD
/2, V
REFBP
= V
REFA
= V
REFB
= V
REFC
= V
REFD
= +2.5V (external reference), V
REFDAC
= V
REFDACH
= +1.25V (external reference), V
REFDACL
=
0V, C
REFBP
= C
REFA
= C
REFB
= C
REFC
= C
REFD
= C
REFDAC
= 1µF, f
SCLK
= 38.4MHz, f
EXCLK
= 38.4MHz (external clock applied to
OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through
a series 150Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. DIFF = 1. T
A
= T
MIN
to T
MAX
, unless otherwise noted
(Note 1). Typical values are at T
A
= +25°C.)
PARAMETER
Maximum Full-Scale Input
Input-Referred Noise Spectral
Density
Second Harmonic to
Fundamental
Third Harmonic to Fundamental
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Channel Phase Matching
SFDR
Unused channels are shorted and
unconnected
Between all channels, including complete
analog signal path
ADC modulator gain = 1
100kHz
-0.05
SYMBOL
CONDITIONS
ADC modulator gain = 1
100kHz
MIN
TYP
150
20
-92
-94
92
110
+0.05
MAX
UNITS
mV
P-P
nV/√Hz
dB
dB
dB
dB
Degrees
DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 8 x (25kHz -1dB Full-Scale Signal))
DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 16 x (25kHz -1dB Full-Scale Signal))
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]