34AA04
4K I
2
C
™
Serial EEPROM with Software Write-Protect
Device Selection Table
Part
Number
34AA04
V
CC
Range
1.7-3.6
Max. Clock
Frequency
1 MHz
(1)
Temp
Ranges
I, E
Description
The Microchip Technology Inc. 34AA04 is a 4 Kbit
Electrically Erasable PROM which utilizes the I
2
C serial
interface and is capable of operation across a broad
voltage range (1.7V to 3.6V). This device is JEDEC
JC42.4 (EE1004-v) Serial Presence Detect (SPD)
compliant and includes reversible software write
protection for each of four independent 128 x 8-bit
blocks. The device features a page write capability of
up to 16 bytes of data. Address pins allow up to eight
devices on the same bus.
The 34AA04 is available in the 8-lead PDIP, SOIC,
TSSOP, TDFN, and UDFN packages.
Note 1:
400 kHz for 1.8V
≤
V
CC
< 2.2V
100 kHz for V
CC
< 1.8V
Features
• 4 Kbit EEPROM:
- Internally organized as two 256 x 8-bit banks
- Byte or page writes (up to 16 bytes)
- Byte or sequential reads within a single bank
- Self-timed write cycle (5 ms max.)
• JEDEC
®
JC42.4 (EE1004-v) Serial Presence
Detect (SPD) Compliant for DRAM (DDR4)
modules
• High-Speed I
2
C™ Interface:
- Industry standard 1 MHz, 400 kHz, and
100 kHz
- Schmitt Trigger inputs for noise suppression
- SMBus-compatible bus time out
- Cascadable up to eight devices
• Write Protection:
- Reversible software write protection for four
individual 128-byte blocks
• Low-Power CMOS Technology:
- Voltage range: 1.7V to 3.6V
- Write current: 1.5 mA at 3.6V
- Read current: 200 µA at 3.6V, 400 kHz
- Standby current: 1 µA at 3.6V
• High Reliability:
- More than one million erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-lead PDIP, SOIC, TSSOP, TDFN, and UDFN
Packages
• Available Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Package Types
PDIP/SOIC/TSSOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
NC
SCL
SDA
TDFN/UDFN
A0 1
A1 2
A2 3
V
SS
4
8 V
CC
7 NC
6 SCL
5 SDA
Block Diagram
A0 A1 A2
HV Generator
Block 0
(000h-07Fh)
Block 1
(080h-0FFh)
Block 2
(100h-17Fh)
Block 3
(180h-1FFh)
I/O
Control
Logic
Memory
Control
Logic
XDEC
SDA SCL
V
CC
V
SS
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
2014 Microchip Technology Inc.
DS20005271B-page 1
34AA04
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All Inputs and Outputs (except A0) w.r.t. V
SS
............................................................................................... -0.3V to 6.5V
A0 Input w.r.t. V
SS
........................................................................................................................................... -0.3 to 12V
Storage Temperature...............................................................................................................................-65°C to +150°C
Ambient Temperature with Power Applied ..............................................................................................-40°C to +125°C
ESD Protection on All Pins
4 kV
† NOTICE:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC SPECIFICATIONS
V
CC
= +1.7V to +3.6V
Industrial (I): T
A
= -40°C to +85°C
Automotive (E): T
A
= -40°C to +125°C
Characteristic
A0, A1, A2, SCL, and SDA
High-Level Input Voltage
Low-Level Input Voltage
Hysteresis of Schmitt
Trigger Inputs
Low-Level Output Voltage
High-Voltage Detect
(A0 pin only)
Input Leakage Current
Output Leakage Current
Min.
—
0.7 V
CC
—
0.0 V
CC
—
7
V
CC
+ 4.8
—
—
—
—
—
Standby Current
—
—
Max.
—
V
CC
+ 0.5
0.3 V
CC
0.2 V
CC
—
0.40
0.40
10
10
±1
±1
10
1.5
200
1
5
Units
—
V
V
V
V
V
V
V
V
A
A
pF
mA
A
A
A
V
CC
≥
2.5V
V
CC
< 2.5V
(Note)
I
OL
= 20.0 mA, V
CC
= 2.2V
I
OL
= 6.0 mA, V
CC
= 1.7V
V
CC
< 2.2V
V
CC
2.2V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.5V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 3.6V
V
CC
= 3.6V, SCL = 400 kHz
Industrial
Automotive
SDA, SCL, V
CC
= 3.6V
A0, A1, A2 = V
SS
Conditions
DC CHARACTERISTICS
Param.
No.
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Symbol
—
V
IH
V
IL
V
HYS
V
OL
V
HV
I
LI
I
LO
C
IN
, C
OUT
Pin Capacitance
(all inputs/outputs)
I
CC
write
I
CC
read
I
CCS
Operating Current
Note:
This parameter is periodically sampled and not 100% tested.
DS20005271B-page 2
2014 Microchip Technology Inc.
34AA04
TABLE 1-2:
AC SPECIFICATIONS
V
CC
= +1.7V to +3.6V
Industrial (I): T
A
= -40°C to +85°C
Automotive (E): T
A
= -40°C to +125°C
Characteristic
Clock Frequency
(Note
2)
Min.
10
10
10
4000
600
260
4700
1300
500
—
—
—
—
—
—
4000
600
260
4700
600
260
0
250
100
50
4000
600
260
200
200
—
4700
1300
500
—
—
25
1M
Max.
100
400
1000
—
—
—
—
—
—
1000
300
120
300
300
120
—
—
—
—
—
—
—
—
—
—
—
—
—
3450
900
350
—
—
—
50
5
35
—
Units
kHz
Conditions
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
(Note
3)
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
1.7V
V
CC
< 1.8V
1.8V
V
CC
2.2V
2.2V
V
CC
3.6V
(Note
1)
—
—
Page mode, 25°C, V
CC
= 3.6V
(Note
4)
AC CHARACTERISTICS
Param.
No.
1
Symbol
F
CLK
2
T
HIGH
Clock High Time
ns
3
T
LOW
Clock Low Time
ns
4
T
R
SDA and SCL Rise Time
(Note
1)
ns
5
T
F
SDA and SCL Fall Time
(Note
1)
ns
6
T
HD
:
STA
Start Condition Hold Time
ns
7
T
SU
:
STA
Start Condition Setup Time
ns
8
9
T
HD
:
DAT
T
SU
:
DAT
Data Input Hold Time
Data Input Setup Time
ns
ns
10
T
SU
:
STO
Stop Condition Setup Time
ns
11
T
AA
Output Valid from Clock
(Note
3)
ns
12
T
BUF
Bus Free Time: Time the bus must
be free before a new transmission
can start
Input Filter Spike Suppression
(SDA and SCL pins)
Write Cycle Time (byte or page)
Bus Timeout Time
Endurance
ns
13
14
15
16
T
SP
T
WC
T
TIMEOUT
—
ns
ms
ms
cycles
Note 1:
Not 100% tested.
2:
The minimum clock frequency of 10 kHz is to prevent the bus timeout from occurring.
3:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
200 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
2014 Microchip Technology Inc.
DS20005271B-page 3
34AA04
FIGURE 1-1:
BUS TIMING DATA
5
2
D3
4
SCL
SDA
In
7
6
13
3
8
9
10
11
SDA
Out
12
DS20005271B-page 4
2014 Microchip Technology Inc.
34AA04
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in
Table 2-1.
TABLE 2-1:
Symbol
A0/V
HV
A1
A2
V
SS
SDA
SCL
NC
V
CC
Note:
PIN FUNCTION TABLE
PDIP
1
2
3
4
5
6
7
8
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
UDFN
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
Description
Chip Address Input, High-Voltage Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Not Connected
+1.7V to 3.6V Power Supply
Exposed pad on TDFN/UDFN can be connected to V
SS
or left floating.
2.1
A0, A1, A2 Chip Address Inputs
2.3
Serial Clock (SCL)
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 34AA04 devices may be connected to the
same bus by using different Chip Select bit combina-
tions. These inputs must be connected to either V
SS
or
V
CC
.
The A0 pin also serves as the high-voltage input for
enabling the SWPn and CWP instructions.
Note:
The comparison between the A0, A1, and
A2 pins and the corresponding Chip
Select bits is disabled for software Write-
Protect and Bank Select commands.
This input is used to synchronize the data transfer to
and from the device.
2.2
Serial Address/Data Input/Output
(SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal. Therefore, the SDA bus requires a pull-
up resistor to V
CC
(typical 10 k for 100 kHz, 2 k for
400 kHz and 1 MHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2014 Microchip Technology Inc.
DS20005271B-page 5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
