solutions optimized for synchronous buck applications to
offer high current, high efficiency, and high power
density performance. Packaged in Vishay’s proprietary
6 mm x 6 mm MLP package, SiC788 and SiC788A enable
voltage regulator designs to deliver up to 50 A continuous
current per phase.
The
internal
power
MOSFETs
utilize
Vishay’s
state-of-the-art Gen IV TrenchFET technology that delivers
industry benchmark performance to significantly reduce
switching and conduction losses.
The SiC788 and SiC788A incorporate an advanced
MOSFET gate driver IC that features high current driving
capability, adaptive dead-time control, an integrated
bootstrap Schottky diode, a thermal warning (THWn) that
alerts the system of excessive junction temperature, and
skip mode (SMOD#) to improve light load efficiency. The
drivers are also compatible with a wide range of PWM
controllers and supports tri-state PWM, 3.3 V (SiC788A) /
5 V (SiC788) PWM logic.
FEATURES
• Thermally enhanced PowerPAK
®
MLP66-40L
package
• Vishay’s Gen IV MOSFET technology and a
low-side MOSFET with integrated Schottky
diode
• Delivers up to 50 A continuous current
• 95 % peak efficiency
• High frequency operation up to 1.5 MHz
• Power MOSFETs optimized for 12 V input stage
• 3.3 V (SiC788A) / 5 V (SiC788) PWM logic with tri-state and
hold-off
• SMOD# logic for light load efficiency improvement
• Low PWM propagation delay (< 20 ns)
• Thermal monitor flag
• Faster enable / disable
• Under voltage lockout for V
CIN
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
APPLICATIONS
• Multi-phase VRDs for CPU, GPU, and memory
TYPICAL APPLICATION DIAGRAM
5V
V
DRV
V
IN
V
IN
GH
BOOT
V
CIN
SMOD#
PWM
controller
DSBL#
PWM
THWn
Gate
driver
PHASE
V
SWH
V
OUT
Fig. 1 - SiC788 and SiC788A Typical Application Diagram
C
GND
G
L
P
GND
S15-0163-Rev. C, 02-Feb-15
Document Number: 62985
1
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC788, SiC788A
www.vishay.com
PINOUT CONFIGURATION
39 DSBL#
37 CGND
37 CGND
40 PWM
39 DSBL#
31 VSWH
32 VSWH
31 VSWH
33 VSWH
32 VSWH
34 VSWH
33 VSWH
35 VSWH
34 VSWH
35 VSWH
38 THWn
38 THWn
40 PWM
36
GL
36
GL
Vishay Siliconix
SMOD#
1
VCIN 2
VDRV 3
BOOT 4
CGND 5
GH
6
PHASE 7
VIN 8
VIN 9
VIN 10
42
VIN
43
VSWH
41
CGND
30 VSWH
29 VSWH
28 PGND
27 PGND
26 PGND
25 PGND
24 PGND
23 PGND
22 PGND
21 PGND
VSWH 30
VSWH 29
PGND 28
PGND 27
PGND 26
PGND 25
PGND 24
PGND 23
PGND 22
PGND 21
42
VIN
43
VSWH
41
CGND
1
SMOD#
2 VCIN
3 VDRV
4 BOOT
5 CGND
6
GH
7 PHASE
8 VIN
9 VIN
10 VIN
PGND 20
PGND 19
PGND 18
PGND 17
PGND 16
VSWH 15
VSWH 15
PGND 17
PGND 18
PGND 19
PGND 20
PGND 16
VIN 14
VIN 13
VIN 12
VIN 11
VIN 12
VIN 13
VIN 14
Top view
Bottom view
Fig. 2 - SiC788 and SiC788A Pin Configuration
PIN DESCRIPTION
PIN NUMBER
1
2
3
4
5, 37, 41
6
7
8 to 14, 42
15, 29 to 35, 43
16 to 28
36
38
39
40
NAME
SMOD#
V
CIN
V
DRV
BOOT
C
GND
GH
PHASE
V
IN
V
SWH
P
GND
GL
THWn
DSBL#
PWM
FUNCTION
Low-side gate turn-off logic. Active low
Supply voltage for internal logic circuitry
Supply voltage for internal gate driver
High-side driver bootstrap voltage
Analog ground for the driver IC
High-side gate signal
Return path of high-side gate driver
Power stage input voltage. Drain of high-side MOSFET
Switch node of the power stage
Power ground
Low-side gate signal
Thermal warning open drain output
Disable pin. Active low
PWM control input
ORDERING INFORMATION
PART NUMBER
SiC788ACD-T1-GE3
SiC788CD-T1-GE3
SiC788ADB and SiC788DB
PACKAGE
PowerPAK
®
MLP66-40L
MARKING CODE
SiC788A
SiC788
Reference board
OPTION
3.3 V PWM optimized
5 V PWM optimized
S15-0163-Rev. C, 02-Feb-15
Document Number: 62985
2
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VIN 11
SiC788, SiC788A
www.vishay.com
Vishay Siliconix
CONDITIONS
V
IN
V
CIN
V
DRV
V
SWH
V
BOOT
V
BOOT- PHASE
LIMIT
-0.3 to +25
-0.3 to +7
-0.3 to +7
-0.3 to +25
-8 to +30
32
38
-0.3 to +7
-0.3 to +8
-0.3 to V
CIN
+ 0.3
f
S
= 300 kHz, V
IN
= 12 V, V
OUT
= 1.8 V
f
S
= 1 MHz, V
IN
= 12 V, V
OUT
= 1.8 V
T
J
T
A
T
stg
Human body model, JESD22-A114
Charged device model, JESD22-C101
50
40
150
-40 to +125
-65 to +150
5000
1000
V
°C
A
V
UNIT
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL PARAMETER
Input Voltage
Control Logic Supply Voltage
Drive Supply Voltage
Switch Node (DC voltage)
Switch Node (AC
voltage)
(1)
BOOT Voltage (DC voltage)
BOOT Voltage (AC voltage)
(2)
BOOT to PHASE (DC voltage)
BOOT to PHASE (AC voltage)
All Logic Inputs and Outputs
(PWM, DSBL#, and THWn)
Output Current, I
OUT(AV) (4)
Max. Operating Junction Temperature
Ambient Temperature
Storage Temperature
Electrostatic Discharge Protection
(3)
Notes
(1)
The specification values indicated “AC” is V
SWH
to P
GND
, -8 V (< 20 ns, 10 μJ), min. and 30 V (< 50 ns), max.
(2)
The specification value indicates “AC voltage” is V
BOOT
to P
GND
, 36 V (< 50 ns) max.
(3)
The specification value indicates “AC voltage” is V
BOOT
to V
PHASE
, 8 V (< 20 ns) max.
(4)
Output current rated with testing evaluation board at T = 25 °C with natural convection cooling. The rating is limited by the peak evaluation
A
board temperature, T
J
= 150 °C, and varies depending on the operating conditions and PCB layout. This rating may be changed with different
application settings.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
ELECTRICAL PARAMETER
Input Voltage (V
IN
)
Drive Supply Voltage (V
DRV
)
Control Logic Supply Voltage (V
CIN
)
BOOT to PHASE (V
BOOT-PHASE
, DC voltage)
Thermal Resistance from Junction to PAD
Thermal Resistance from Junction to Case
MINIMUM
4.5
4.5
4.5
4
-
-
TYPICAL
-
5
5
4.5
1
2.5
MAXIMUM
18
5.5
5.5
5.5
-
-
°C/W
V
UNIT
S15-0163-Rev. C, 02-Feb-15
Document Number: 62985
3
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC788, SiC788A
www.vishay.com
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
(DSBL# = SMOD# = 5 V, V
IN
= 12 V, V
DRV
and V
CIN
= 5 V, T
A
= 25 °C)
PARAMETER
POWER SUPPLY
Control Logic Supply Current
I
VCIN
V
DSBL#
= 0 V, no switching, V
PWM
= FLOAT
V
DSBL#
= 5 V, no switching, V
PWM
= FLOAT
V
DSBL#
= 5 V, f
S
= 300 kHz, D = 0.1
f
S
= 300 kHz, D = 0.1
f
S
= 1 MHz, D = 0.1
V
DSBL#
= 0 V, no switching
V
DSBL#
= 5 V, no switching
I
F
= 2 mA
3.4
0.72
-
0.9
3.1
-
-
V
PWM
= 5 V
V
PWM
= 0 V
-
-
2.2
0.72
-
0.9
1.95
-
-
V
PWM
= 3.3 V
V
PWM
= 0 V
-
-
-
-
-
No load, see fig. 4
-
-
-
Fig. 5
Fig. 5
-
-
30
Input logic high
Input logic low
Input logic high
Input logic low
2
-
2
-
3.7
0.9
2.3
1.15
3.35
225
325
-
-
2.45
0.9
1.8
1.15
2.2
225
275
-
-
30
130
18
15
12
8
15
20
-
-
-
-
-
-
-
-
-
-
-
-
85
290
295
9
30
30
55
-
-
-
15
-
-
-
0.4
4.0
1.1
-
1.38
3.6
-
mV
V
HYS_TRI_F
I
PWM
V
TH_PWM_R
V
TH_PWM_F
V
TRI
V
TRI_TH_R
V
TRI_TH_F
V
HYS_TRI_R
V
HYS_TRI_F
I
PWM
-
350
-350
2.7
1.1
-
1.38
2.45
-
mV
-
225
-225
-
-
-
-
-
-
-
-
-
-
0.8
-
0.8
ns
μA
μA
μA
SYMBOL
TEST CONDITION
LIMITS
MIN.
TYP.
MAX.
UNIT
mA
μA
Drive Supply Current
I
VDRV
BOOTSTRAP SUPPLY
Bootstrap Diode Forward Voltage
PWM CONTROL INPUT (SiC788)
Rising Threshold
Falling Threshold
Tri-state Voltage
Tri-state Rising Threshold
Tri-state Falling Threshold
Tri-state Rising Threshold
Hysteresis
Tri-state Falling Threshold
Hysteresis
PWM Input Current
PWM CONTROL INPUT (SiC788A)
Rising Threshold
Falling Threshold
Tri-state Voltage
Tri-state Rising Threshold
Tri-state Falling Threshold
Tri-state Rising Threshold
Hysteresis
Tri-state Falling Threshold
Hysteresis
PWM Input Current
TIMING SPECIFICATIONS
Tri-State to GH/GL Rising
Propagation Delay
Tri-state Hold-off Time
GH - Turn Off Propagation Delay
GH - Turn On Propagation Delay
(Dead time rising)
GL - Turn Off Propagation Delay
GL - Turn On Propagation Delay
(Dead time falling)
DSBL# Low to GH/GL Falling
Propagation Delay
DSBL# High to GH/GL Rising
Propagation Delay
PWM Minimum On-time
DSBL# SMOD# INPUT
DSBL# Logic Input Voltage
SMOD# Logic Input Voltage
V
F
V
TH_PWM_R
V
TH_PWM_F
V
TRI
V
TRI_TH_R
V
TRI_TH_F
V
HYS_TRI_R
V
V
PWM
= FLOAT
V
V
PWM
= FLOAT
V
t
PD_TRI_R
t
TSHO
t
PD_OFF_GH
t
PD_ON_GH
t
PD_OFF_GL
t
PD_ON_GL
t
PD_DSBL#_F
t
PD_DSBL#_R
t
PWM_ON_MIN
V
IH_DSBL#
V
IL_DSBL#
V
IH_SMOD#
V
IL_SMOD#
V
S15-0163-Rev. C, 02-Feb-15
Document Number: 62985
4
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC788, SiC788A
www.vishay.com
ELECTRICAL SPECIFICATIONS
(DSBL# = SMOD# = 5 V, V
IN
= 12 V, V
DRV
and V
CIN
= 5 V, T
A
= 25 °C)
PARAMETER
PROTECTION
Under Voltage Lockout
Under Voltage Lockout Hysteresis
THWn Flag
THWn Flag
Set
(2)
Clear
(2)
V
UVLO
V
UVLO_HYST
T
THWn_SET
T
THWn_CLEAR
T
THWn_HYST
V
OL_THWn
I
THWn
= 2 mA
V
CIN
rising, on threshold
V
CIN
falling, off threshold
-
2.7
-
-
-
-
-
3.7
3.1
575
160
135
25
0.02
4.1
-
-
-
-
-
-
V
°C
V
mV
SYMBOL
TEST CONDITION
LIMITS
MIN.
TYP.
MAX.
UNIT
Vishay Siliconix
THWn Flag Hysteresis
(2)
THWn Output Low
Notes
(1)
Typical limits are established by characterization and are not production tested.
(2)
Guaranteed by design.
DETAILED OPERATIONAL DESCRIPTION
PWM Input with Tri-state Function
The PWM input receives the PWM control signal from the VR
controller IC. The PWM input is designed to be compatible
with standard controllers using two state logic (H and L) and
advanced controllers that incorporate tri-state logic (H, L
and tri-state) on the PWM output. For two state logic, the
PWM input operates as follows. When PWM is driven above
V
PWM_TH_R
the low-side is turned OFF and the high-side is
turned ON. When PWM input is driven below V
PWM_TH_F
the
high-side is turned OFF and the low-side is turned ON. For
tri-state logic, the PWM input operates as previously stated
for driving the MOSFETs when PWM is logic high and logic
low. However, there is a third state that is entered as the
PWM output of tri-state compatible controller enters its high
impedance state during shut-down. The high impedance
state of the controller’s PWM output allows the SiC788 and
SiC788A to pull the PWM input into the tri-state region (see
definition of PWM logic and tri-state, fig. 4). If the PWM input
stays in this region for the tri-state hold-off period, t
TSHO
,
both high-side and low-side MOSFETs are turned OFF. The
function allows the VR phase to be disabled without
negative output voltage swing caused by inductor ringing
and saves a Schottky diode clamp. The PWM and tri-state
regions are separated by hysteresis to prevent false
triggering. The SiC788A incorporates PWM voltage
thresholds that are compatible with 3.3 V logic and the
SiC788 thresholds are compatible with 5 V logic.
Disable (DSBL#)
In the low state, the DSBL# pin shuts down the driver IC and
disables both high-side and low-side MOSFETs. In this
state, standby current is minimized. If DSBL# is left
unconnected, an internal pull-down resistor will pull the pin
to C
GND
and shut down the IC.
Pre-Charger Function
When DSBL# is driven from below V
IL_DSBL#
to above
V
IH_DSBL#
the low-side is turned ON for a short duration
(60 ns typical) to refresh the BOOT capacitor in case it has
been discharged due to the driver being in standby for a
long period of time.
Diode Emulation Mode (SMOD#)
When SMOD# is logic low diode emulation mode is enabled
and the low-side is turned OFF. This is a non-synchronous
conversion mode that improves light load efficiency by
reducing switching losses. Conducted losses that occur in
synchronous buck regulators when inductor current is
negative can also be reduced. Circuitry in the external
controller IC detects when inductor current crosses zero
and drives SMOD# below V
IL_SMOD#
turning the low-side
MOSFET OFF. The function can be also be used for a
pre-biased output voltage. If SMOD# is left unconnected, an
internal pull up resistor will pull the pin to V
CIN
(logic high) to
disable the SMOD# function.
Thermal Shutdown Warning (THWn)
The THWn pin is an open drain signal that flags the presence
of excessive junction temperature. Connect, with a
maximum of 20 kΩ, to V
CIN
. An internal temperature sensor
detects the junction temperature. The temperature
threshold is 160 °C. When this junction temperature is
exceeded the THWn flag is set. When the junction
temperature drops below 135 °C the device will clear the
THWn signal. The SiC788 and SiC788A do not stop
operation when the flag is set. The decision to shutdown
must be made by an external thermal control function.
Voltage Input (V
IN
)
This is the power input to the drain of the high-side power
MOSFET. This pin is connected to the high power
intermediate BUS rail.
S15-0163-Rev. C, 02-Feb-15
Document Number: 62985
5
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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