NCP1246
Fixed Frequency Current
Mode Controller for Flyback
Converters
The NCP1246 is a new fixed−frequency current−mode controller
featuring the Dynamic Self−Supply. This function greatly simplifies
the design of the auxiliary supply and the V
CC
capacitor by activating
the internal startup current source to supply the controller during
start−up, transients, latch, stand−by etc. This device contains a special
HV detector which detect the application unplug from the AC input
line and triggers the X2 discharge current. This HV structure allows
the brown−out detection as well.
It features a timer−based fault detection that ensures the detection of
overload and an adjustable compensation to help keep the maximum
power independent of the input voltage.
Due to frequency foldback, the controller exhibits excellent
efficiency in light load condition while still achieving very low
standby power consumption. Internal frequency jittering, ramp
compensation, and a versatile latch input make this controller an
excellent candidate for the robust power supply designs.
A dedicated Off mode allows to reach the extremely low no load
input power consumption via “sleeping” whole device and thus
minimize the power consumption of the control circuitry.
Features
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MARKING
DIAGRAM
8
46XXfff
ALYWX
G
1
SOIC−7
CASE 751U
46XXfff = Specific Device Code
XX = A, B or AL
fff = 065 or 100
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
PIN CONNECTIONS
Latch 1
FB 2
8
HV
•
Fixed−Frequency Current−Mode Operation (65 kHz and 100 kHz
•
•
•
•
•
•
•
•
•
•
•
•
•
frequency options)
6 V
CC
CS 3
Frequency Foldback then Skip Mode for Maximized Performance in
GND 4
5 DRV
Light Load and Standby Conditions
(Top View)
Timer−Based Overload Protection with Latched (Option A) or
Auto−Recovery (Option B) Operation
High−voltage Current Source with Brown−Out Detection and
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Dynamic Self−Supply, Simplifying the Design of the V
CC
Circuitry
dimensions section on page 38 of this data sheet.
Frequency Modulation for Softened EMI Signature
Adjustable Overpower Protection Dependant on the Bulk Voltage
Latch−off Input Combined with the Overpower Protection Sensing
Input
V
CC
Operation up to 28 V, With Overvoltage Detection
500/800 mA Source/Sink Drive Peak Current Capability
Typical Applications
10 ms Soft−Start, 4 ms Soft−Start (AL/BL Versions)
•
AC−DC Adapters for Notebooks, LCD, and Printers
Internal Thermal Shutdown
•
Offline Battery Chargers
No−Load Standby Power < 30 mW
•
Consumer Electronic Power Supplies
X2 Capacitor in EMI Filter Discharging Feature
•
Auxiliary/Housekeeping Power Supplies
These Devices are Pb−Free, Halogen Free/BFR Free
•
Offline Adapters for Notebooks
and are RoHS Compliant
©
Semiconductor Components Industries, LLC, 2017
1
March, 2017 − Rev. 7
Publication Order Number:
NCP1246/D
NCP1246
TYPICAL APPLICATION EXAMPLE
Figure 1. Flyback Converter Application Using the NCP1246
PIN FUNCTION DESCRIPTION
Pin No
1
2
3
4
5
6
Pin Name
LATCH
FB
CS
GND
DRV
VCC
Function
Latch−Off Input
Feedback + Shutdown pin
Current Sense
−
Drive output
VCC input
Pin Description
Pull the pin up or down to latch−off the controller. An internal current source
allows the direct connection of an NTC for over temperature detection.
An optocoupler collector to ground controls the output regulation. The part
goes to the low consumption Off mode if the FB input pin is pulled to GND.
This Input senses the Primary Current for current−mode operation, and
offers an overpower compensation adjustment.
The controller ground
Drives external MOSFET
This supply pin accepts up to 28 Vdc, with overvoltage detection. The pin is
connected to an external auxiliary voltage. It is not allowed to connect
another circuit to this pin to keep low input power consumption.
Connects to the rectified AC line to perform the functions of Start−up
Current Source, Self−Supply, brown−out detection and X2 capacitor
discharge function and the HV sensing for the overpower protection
purposes. It is not allowed to connect this pin to DC voltage.
8
HV
High−voltage pin
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2
NCP1246
SIMPLIFIED INTERNAL BLOCK SCHEMATIC
LATCH
ON_CMP
Figure 2. Simplified Internal Block Schematic
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3
NCP1246
MAXIMUM RATINGS
Rating
DRV
(pin 5)
V
CC
(pin 6)
HV
(pin 8)
V
max
R
qJ−A
Symbol
Maximum voltage on DRV pin
(Dc−Current self−limited if operated within the allowed range) (Note 1)
V
CC
Power Supply voltage, V
CC
pin, continuous voltage
Power Supply voltage, V
CC
pin, continuous voltage (Note 1)
Maximum voltage on HV pin
(Dc−Current self−limited if operated within the allowed range)
Maximum voltage on low power pins (except pin 5, pin 6 and pin 8)
(Dc−Current self−limited if operated within the allowed range) (Note 1)
Thermal Resistance SOIC−7
Junction-to-Air, low conductivity PCB (Note 2)
Junction-to-Air, medium conductivity PCB (Note 3)
Junction-to-Air, high conductivity PCB (Note 4)
Thermal Resistance Junction−to−Case
Operating Junction Temperature
Storage Temperature Range
ESD Capability, HBM model (All pins except HV) per JEDEC Standard JESD22, Method A114E
ESD Capability, HBM model (HV pin) per JEDEC Standard JESD22, Method A114E
ESD Capability, Machine Model per JEDEC Standard JESD22, Method A115A
ESD Capability, Charged Device Model per JEDEC Standard JESD22−C101D
Value
–0.3 to 20
±1000
(peak)
–0.3 to 28
±30
(peak)
–0.3 to 500
±20
–0.3 to 10
±10
(peak)
162
147
115
73
−40 to +150
−60 to +150
> 2000
> 1000
> 200
> 1000
°C/W
°C
°C
V
V
V
V
Unit
V
mA
V
mA
V
mA
V
mA
°C/W
R
qJ−C
T
JMAX
T
STRGMAX
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device contains latch-up protection and exceeds 100 mA per JEDEC Standard JESD78.
2. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 50 mm
2
of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-1 conductivity test PCB. Test conditions were under natural convection or zero air flow.
3. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 100 mm
2
of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-2 conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 650 mm
2
of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-3 conductivity test PCB. Test conditions were under natural convection or zero air flow.
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NCP1246
ELECTRICAL CHARACTERISTICS
(For typical values T
J
= 25°C, for min/max values T
J
= −40°C to +125°C, V
HV
= 125 V,
V
CC
= 11 V unless otherwise noted)
Characteristics
HIGH VOLTAGE CURRENT SOURCE
Minimum voltage for current source
operation
Current flowing out of V
CC
pin
Off−state leakage current
Off−mode HV supply current
V
CC
= 0 V
V
CC
= V
CC(on)
− 0.5 V
V
HV
= 500 V, V
CC
= 15 V
V
HV
= 141 V,
V
HV
= 325 V,
V
CC
loaded by 4.7
mF
cap
V
HV(min)
I
start1
I
start2
I
start(off)
I
HV(off)
−
0.2
5
10
−
−
30
0.5
8
25
45
50
40
0.8
11
50
60
70
V
mA
mA
mA
Test Condition
Symbol
Min
Typ
Max
Unit
SUPPLY
HV current source regulation threshold
Turn−on threshold level, V
CC
going up
HV current source stop threshold
HV current source restart threshold
Turn−off threshold
Overvoltage threshold
Blanking duration on V
CC(off)
and V
CC(ovp)
detection
V
CC
decreasing level at which the internal
logic resets
V
CC
level for I
START1
to I
START2
transition
Internal current consumption (Note 5)
DRV open, V
FB
= 3 V, 65 kHz
DRV open, V
FB
= 3 V, 100 kHz
Cdrv = 1 nF, V
FB
= 3 V, 65 kHz
Cdrv = 1 nF, V
FB
= 3 V, 100 kHz
Off mode (skip or before start−up)
I
CC4
Fault mode (fault or latch)
BROWN−OUT
Brown−Out thresholds
Brown−Out thresholds (AL/BL Versions)
Timer duration for line cycle drop−out
X2 DISCHARGE
Comparator hysteresis observed at HV pin
HV signal sampling period
Timer duration for no line detection
Discharge timer duration
OSCILLATOR
Oscillator frequency
Maximum on time for T
J
= 25°C to +125°C
only
f
OSC
= 65 kHz
f
OSC
= 100 kHz
f
OSC
t
ONmax(65kHz)
t
ONmax(100kHz)
58
87
11.5
7.5
65
100
12.3
8.0
72
109
13.1
8.5
kHz
ms
V
HV(hyst)
T
sample
t
DET
t
DIS
1.5
−
21
21
3.5
1.0
32
32
5
−
43
43
V
ms
ms
ms
V
HV
going up
V
HV
going down
V
HV
going up
V
HV
going down
V
HV(start)
V
HV(stop)
V
HV(start)
V
HV(stop)
t
HV
102
94
92
84
43
111
103
101
93
−
120
112
110
102
86
V
V
ms
0.3
0.6
0.9
V
CC(reg)
V
CC(on)
V
CC(min)
V
CC(off)
V
CC(ovp)
t
VCC(blank)
V
CC(reset)
V
CC(inhibit)
I
CC
1
I
CC
1
I
CC
2
I
CC
2
I
CC3
8
11.0
9.5
8.5
25
−
4.8
0.2
1.3
1.3
1.8
2.3
0.67
11
12.0
10.5
8.9
26.5
10
7.0
0.8
1.85
1.85
2.6
2.9
0.9
−
13.0
11.5
9.3
28
−
7.7
1.25
2.2
2.2
3.0
3.5
1.13
V
V
V
V
V
ms
V
V
mA
5. Internal supply current only, currents sourced via FB pin is not included (current is flowing in GND pin only).
6. Guaranteed by design.
7. CS pin source current is a sum of I
bias
and I
OPC
, thus at V
HV
= 125 V is observed the I
bias
only, because I
OPC
is switched off.
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