19-0435; Rev 0; 9/95
KIT
ATION
EVALU
BLE
AVAILA
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
____________________________Features
o
12-Bit Resolution, 1/2LSB Linearity
o
Single +5V Supply Operation
o
Software-Selectable Input Ranges:
±10V, ±5V, 0V to +10V, 0V to +5V (MAX196)
±V
REF
, ±V
REF
/2, 0V to +V
REF
, 0V to +V
REF
/2
(MAX198)
o
Internal 4.096V or External Reference
o
Fault-Protected Input Multiplexer
o
6 Analog Input Channels
o
6µs Conversion Time, 100ksps Sampling Rate
o
Internal or External Acquisition Control
o
Two Power-Down Modes
o
Internal or External Clock
_______________General Description
The MAX196/MAX198 multirange, 12-bit data-acquisi-
tion systems (DAS) require only a single +5V supply for
operation, yet convert analog signals at their inputs up
to ±10V (MAX196) and ±4V (MAX198). These systems
provide six analog input channels that are indepen-
dently software programmable for a variety of ranges:
±10V, ±5V, 0V to +10V, and 0V to +5V for the MAX196;
±V
REF
, ±V
REF
/2, 0V to +V
REF
, and 0V to +V
REF
/2 for
the MAX198. This range switching increases the effec-
tive dynamic range to 14 bits and provides the flexibility
to interface ±12V, ±15V, and 4mA to 20mA powered
sensors to a single +5V system. In addition, these con-
verters are fault protected to ±16.5V; a fault condition
on any channel will
not
affect the conversion result of
the selected channel. Other features include a 5MHz
bandwidth track/hold, 100ksps throughput rate, soft-
ware-selectable internal/external clock, internal/external
acquisition control, 12-bit parallel interface, and internal
4.096V or external reference.
Two programmable power-down modes (STBYPD,
FULLPD) provide low-current shutdown between con-
versions. In STBYPD mode, the reference buffer
remains active, eliminating start-up delays.
The MAX196/MAX198 employ a standard microproces-
sor (µP) interface. A three-state data I/O port is config-
ured to operate with 16-bit data buses, and data-
access and bus-release timing specifications are com-
patible with most popular µPs. All logic inputs and out-
puts are TTL/CMOS compatible.
These devices are available in 28-pin DIP, wide SO,
SSOP (55% smaller in area than wide SO), and ceramic
SB packages. For 8+4 bus interface, see the MAX197
and the MAX199 data sheets. An evaluation kit will be
available after December 1995 (MAX196EVKIT-DIP).
MAX196/MAX198
______________Ordering Information
PART
MAX196ACNI
MAX196BCNI
MAX196ACWI
MAX196BCWI
MAX196ACAI
MAX196BCAI
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
28 Narrow Plastic DIP
28 Narrow Plastic DIP
28 Wide SO
28 Wide SO
28 SSOP
28 SSOP
Ordering Information continued at end of data sheet.
__________________Pin Configuration
TOP VIEW
CLK 1
CS 2
D11 3
D10 4
28 DGND
27 V
DD
26 WR
25 RD
________________________Applications
Industrial-Control Systems
Robotics
Data-Acquisition Systems
Automatic Testing Systems
Medical Instruments
Telecommunications
D9 5
D8 6
D7 7
D6 8
D5 9
D4 10
D3 11
D2 12
D1 13
D0 14
MAX196
MAX198
24 INT
23 REF
22 REFADJ
21 CH5
20 CH4
19 CH3
18 CH2
17 CH1
16 CH0
15 AGND
Functional Diagram appears at end of data sheet.
DIP/SO/SSOP/Ceramic SB
1
________________________________________________________________
Maxim Integrated Products
Call toll free 1-800-722-8266 for free samples or literature.
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
MAX196/MAX198
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND............................................................-0.3V to +7V
AGND to DGND.....................................................-0.3V to +0.3V
REF to AGND..............................................-0.3V to (V
DD
+ 0.3V)
REFADJ to AGND.......................................-0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (V
DD
+ 0.3V)
Digital Outputs to DGND ............................-0.3V to (V
DD
+ 0.3V)
CH0–CH5 to AGND ..........................................................±16.5V
Continuous Power Dissipation (T
A
= +70°C)
Narrow Plastic DIP (derate 14.29mW/°C above +70°C)....1143mW
Wide SO (derate 12.50mW/°C above +70°C)..............1000mW
SSOP (derate 9.52mW/°C above +70°C) ......................762mW
Narrow Ceramic SB (derate 20.00mW/°C above +70°C)..1600mW
Operating Temperature Ranges
MAX196_C_ I/MAX198_C_ I .................................0°C to +70°C
MAX196_E_ I/MAX198_E_ I ...............................-40°C to +85°C
MAX196_MYI/MAX198_MYI.............................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
ACCURACY
(Note 1)
Resolution
Integral Nonlinearity
Differential Nonlinearity
INL
DNL
Unipolar
Offset Error
Bipolar
Channel-to-Channel Offset
Error Matching
Unipolar
Bipolar
Unipolar
Gain Error
(Note 2)
Bipolar
Gain Temperature Coefficient
(Note 2)
Unipolar
Bipolar
MAX196A/MAX198A
MAX196B/MAX198B
Up to the 5th harmonic
80
50kHz, V
IN
= ±5V (MAX196) or ±4V (MAX198)
(Note 3)
External CLK mode/external acquisition control
External CLK mode/external acquisition control
Aperture Jitter
Internal CLK mode/internal acquisition
control (Note 4)
-86
15
<50
10
70
69
-85
-78
MAX196A/MAX198A
MAX196B/MAX198B
MAX196A/MAX198A
MAX196B/MAX198B
3
5
MAX196A/MAX198A
MAX196B/MAX198B
MAX196A/MAX198A
MAX196B/MAX198B
±0.1
±0.5
±7
±10
±7
±10
ppm/°C
LSB
MAX196A/MAX198A
MAX196B/MAX198B
12
±1/2
±1
±1
±3
±5
±5
±10
LSB
LSB
Bits
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC SPECIFICATIONS
(10kHz sine-wave input, ±10Vp-p (MAX196) or ±4.096Vp-p (MAX198), f
SAMPLE
= 100ksps)
Signal-to-Noise + Distortion Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Crosstalk
Aperture Delay
SINAD
THD
SFDR
dB
dB
dB
dB
ns
ps
ns
2
_______________________________________________________________________________________
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
ANALOG INPUT
Track/Hold Acquisition Time
f
CLK
= 2.0MHz
±10V or ±V
REF
range
Small-Signal Bandwidth
-3dB
rolloff
±5V or ±V
REF
/2 range
0V to 10V or 0V to V
REF
range
0V to 5V or 0V to V
REF
/2 range
MAX196
Unipolar
MAX198
Input Voltage Range
(see Table 3)
V
IN
MAX196
Bipolar
MAX198
MAX196
MAX198
Input Current
I
IN
Bipolar
MAX198
Input Resistance
Input Capacitance
INTERNAL REFERENCE
REF Output Voltage
REF Output Tempco
(Contact Maxim Applications for
guaranteed temperature drift
specifications)
Output Short-Circuit Current
Load Regulation
Capacitive Bypass at REF
REFADJ Output Voltage
REFADJ Adjustment Range
Buffer Voltage Gain
With recommended circuit (Figure 1)
V
REF
TC V
REF
T
A
= +25°C
MAX196_C/MAX198_C
MAX196_E/MAX198_E
MAX196_M/MAX198_M
0mA to 0.5mA output current (Note 6)
4.7
2.465
2.500
±1.5
1.6384
2.535
4.076
4.096
15
30
40
30
10
mA
mV
µF
V
%
V/V
ppm/°C
4.116
V
∆V
IN
∆I
IN
Unipolar
Bipolar
(Note 5)
MAX196
±10V range
±5V range
±V
REF
range
±V
REF
/2 range
-1200
-600
-1200
-600
21
16
40
0V to 10V range
0V to 5V range
0.1
0
0
0
0
-10
-5
-V
REF
-V
REF
/2
5
2.5
2.5
1.25
10
5
V
REF
V
REF
/2
10
5
V
REF
V
REF
/2
720
360
10
720
360
10
10
kΩ
pF
µA
V
MHz
3
µs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX196/MAX198
Unipolar
_______________________________________________________________________________________
3
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
MAX196/MAX198
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Input Voltage Range
Input Current
V
REF
=
4.18V
Normal, or STANDBY
power-down mode
FULL power-down mode
10
5
V
DD
- 50mV
SYMBOL
CONDITIONS
MIN
2.4
TYP
MAX
4.18
400
1
kΩ
MΩ
V
UNITS
V
µA
REFERENCE INPUT
(buffer disabled, reference input applied to REF pin)
Input Resistance
REFADJ Threshold for
Buffer Disable
POWER REQUIREMENTS
Supply Voltage
V
DD
Normal, or STANDBY power-down mode
FULL power-down mode
4.75
Normal mode, bipolar ranges
Normal mode, unipolar ranges
STANDBY power-down mode
FULL power-down mode (Note 7)
External reference = 4.096V
Internal reference
C
CLK
= 100pF
External CLK
Internal CLK
1.25
0.1
Internal acquisition
3.0
3.0
3.0
5
6.0
6.0
62
200
C
REF
= 4.7µF
C
REF
= 33µF
2.4
8
60
7.7
6
700
60
±0.1
±
1
/
2
1.56
5.25
18
10
850
120
±
1
/
2
V
mA
µA
LSB
Supply Current
I
DD
Power-Supply Rejection Ratio
(Note 8)
TIMING
Internal Clock Frequency
External Clock Frequency Range
PSRR
f
CLK
f
CLK
t
ACQI
2.00
2.0
5.0
MHz
MHz
Acquisition Time
t
ACQE
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
t
CONV
External acquisition (Note 9)
After FULLPD or STBYPD
External CLK
Internal CLK, C
CLK
= 100pF
External CLK
Internal CLK, C
CLK
= 100pF
Power-up (Note 10)
To 0.1mV REF bypass
capacitor fully discharged
µs
10.0
100
µs
ksps
µs
ms
DIGITAL INPUTS
(D7–D0, CLK, RD, WR, CS) (Note 11)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
V
INH
V
INL
I
IN
C
IN
V
IN
= 0V or V
DD
(Note 5)
V
0.8
±10
15
V
µA
pF
4
_______________________________________________________________________________________
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Output Low Voltage
Output High Voltage
Three-State Output Capacitance
SYMBOL
V
OL
V
OH
C
OUT
CONDITIONS
V
DD
= 4.75V, I
SINK
= 1.6mA
V
DD
= 4.75V, I
SOURCE
= 1mA
(Note 5)
V
DD
- 1
15
MIN
TYP
MAX
0.4
UNITS
V
V
pF
DIGITAL OUTPUTS
(D11–D0, INT)
MAX196/MAX198
TIMING CHARACTERISTICS
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
; unless otherwise noted.)
PARAMETER
CS Pulse Width
WR Pulse Width
CS to WR Setup Time
CS to WR Hold Time
CS to RD Setup Time
CS to RD Hold Time
CLK to WR Setup Time
CLK to WR Hold Time
Data Valid to WR Setup
Data Valid to WR Hold
RD Low to Output Data Valid
RD High to Output Disable
RD Low to INT High Delay
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
SYMBOL
t
CS
t
WR
t
CSWS
t
CSWH
t
CSRS
t
CSRH
t
CWS
t
CWH
t
DS
t
DH
t
DO
t
TR
t
INT1
Figure 2, C
L
= 100pF (Note 12)
(Note 13)
60
0
120
70
120
CONDITIONS
MIN
80
80
0
0
0
0
100
50
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Accuracy specifications tested at V
DD
= 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply
Rejection test. Tested for the ±10V (MAX196) and ±4.096V (MAX198) input ranges.
External reference: V
REF
= 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB.
Ground “on” channel; sine wave applied to all “off” channels.
Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz.
Guaranteed by design. Not tested.
Use static loads only.
Tested using internal reference.
PSRR measured at full-scale.
External acquisition timing: starts at data valid at ACQMOD = low control byte; ends at rising edge of WR with ACQMOD
= high control byte.
Not subject to production testing. Provided for design guidance only.
All input control signals specified with t
R
= t
F
= 5ns from a voltage level of 0.8V to 2.4V.
t
DO
is measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V or 2.4V.
t
TR
is defined as the time required for the data lines to change by 0.5V.
_______________________________________________________________________________________
5
PCB设计
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
