1805 MHz - 1880 MHz RF/MICROWAVE NARROW BAND HIGH POWER AMPLIFIER
1805 MHz - 1880 MHz 射频/微波窄带高功率放大器
XD010-22S-D2F规格参数
参数名称
属性值
最大工作温度
90 Cel
最小工作温度
-20 Cel
最大输入功率
20 dBm
最大工作频率
1880 MHz
最小工作频率
1805 MHz
加工封装描述
D2F, MODULE-5
状态
DISCONTINUED
最大电压驻波比
5
结构
COMPONENT
端子涂层
TIN LEAD
阻抗特性
50 ohm
微波射频类型
NARROW BAND HIGH POWER
XD010-22S-D2F文档预览
XD010-22S-D2F
Product Description
Sirenza Microdevices’
XD010-22S-D2F
12W power module is a robust 2-
stage Class A/AB amplifier module for use in the driver stages of GSM/
EDGE RF power amplifiers for cellular base stations. The power transistors
are fabricated using Sirenza's latest, high performance LDMOS process.
This unit operates from a single voltage and has internal temperature com-
pensation of the bias voltage to ensure stable performance over the full
temperature range. It is a drop-in, no-tune solution for medium power
applications requiring high efficiency, excellent linearity, and unit-to-unit
repeatability. It is internally matched to 50 ohms.
1805-1880 MHz Class A/AB
12W Power Amplifier Module
Functional Block Diagram
Stage 1
Stage 2
Product Features
Temperature
Compensation
Temperature
Compensation
•
•
•
•
•
•
•
4
5
50
W
RF impedance
12W Output P
1dB
Single Supply Operation : Nominally 28V
High Gain: 31 dB at 1840 MHz
High Efficiency: 25% at 1840 MHz
Advanced, XeMOS II LDMOS FETS
Temperature Compensation
1
2
3
Applications
RF in
V
D1
V
D2
Case Flange = Ground
RF out
•
•
•
Base Station PA driver
Repeater
GSM / EDGE
Key Specifications
Symbol
Frequency
P
1dB
Gain
Gain Flatness
IRL
Efficiency
Linearity
Delay
Phase Linearity
R
TH, j-l
R
TH, j-2
Parameter
Frequency of Operation
Output Power at 1dB Compression (single tone)
Gain at 5W Output Power (CW)
Peak to Peak Gain Variation
Input Return Loss 5W Output (CW)
Drain Efficiency at 10W CW
RMS EVM at 5W EDGE output
Peak EVM at 5W EDGE output
3 Order IMD at 10W PEP (Two Tone; 1MHz
∆F)
Electrical Delay
Deviation from Linear Phase (Peak to Peak)
Thermal Resistance Stage 1 (Junction to Case)
Thermal Resistance Stage 2 (Junction to Case)
rd
Unit
MHz
W
dB
dB
dB
%
%
%
dBc
nS
Deg
ºC/W
ºC/W
Min.
1805
10
28.5
10
20
Typ.
12
31
0.5
14
25
1.5
5
Max.
1880
1.0
-26
-32
2.5
0.5
11
4
Test Conditions Z
in
= Z
out
= 50Ω, V
DD
= 28.0V, I
DQ1
= 230mA, I
DQ2
= 115mA, T
Flange
= 25ºC
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such
information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices
does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court,
Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-102930 Rev C
XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module
Quality Specifications
Parameter
ESD Rating
MTTF
Human Body Model, JEDEC Document - JESD22-A114-B
85
o
C Leadframe, 200
o
C Channel
Unit
V
Hours
Typical
8000
1.2 X 10
6
Pin Description
Pin #
1
2
3,4
5
Flange
Function
RF Input
V
D1
V
D2
RF Output
Gnd
Description
Module RF input. Care must be taken to protect against video transients that may damage the active devices.
This is the drain voltage for the first stage of the amplifier module. The first stage gate bias is temperature compensated to
maintain constant quiscent drain current over the operating temperature range. Nominally +28Vdc See Note 1.
This is the drain voltage for the 2
nd
stage of the amplifier module. The 2
nd
stage gate bias is temperature compensated to
maintain constant quiscent drain current over the operating temperature range. Nominally +28Vdc See Note 1.
Module RF output. Care must be taken to protect against video transients that may damage the active devices.
Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for
optimum thermal and RF performance. See mounting instructions in application note AN-060 on Sirenza’s web site.
Simplified Device Schematic
2 V
D1
3
4 V
D2
Note 1:
The internally generated gate voltage is thermally compen-
sated to maintain constant quiescent current over the temper-
ature range listed in the data sheet. No compensation is
provided for gain changes with temperature. This can only be
accomplished with AGC external to the module.
Note 2:
Internal RF decoupling is included on all bias leads. No addi-
tional bypass elements are required, however some applica-
tions may require energy storage on the drain leads to
accommodate time-varying waveforms.
Note 3:
This module was designed to have its leads hand soldered to
an adjacent PCB. The maximum soldering iron tip tempera-
ture should not exceed 700° C, and the soldering iron tip
should not be in direct contact with the lead for longer than 10
seconds. Refer to app note AN060 (www.sirenza.com) for fur-
ther installation instructions.
Temperature
Compensation
Temperature
Compensation
RF
in
1
Q1
Q2
RF
out
5
Case Flange = Ground
Absolute Maximum Ratings
Parameters
1
st
Stage Bias Voltage (V
D1
)
2
nd
Value
35
35
+20
5:1
+200
-20 to +90
-40 to +100
Unit
V
V
dBm
VSWR
ºC
ºC
ºC
Stage Bias Voltage (V
D2
)
RF Input Power
Load Impedance for Continuous Operation With-
out Damage
Output Device Channel Temperature
Operating Temperature Range
Storage Temperature Range
Operation of this device beyond any one of these limits may cause per-
manent damage. For reliable continuous operation see typical setup val-
ues specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
http://www.sirenza.com
EDS-102930 Rev C
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module
Typical Performance Curves
EVM, Id vs. Output Power and Temperature
Freq=1840 MHz, Vdd=28 V, T
Flange
=-20°C, 25°C, 90°C
EVM @-20°C
EVM @ 25°C
EVM @ 90°C
Id @-20°C
Id @ 25°C
Id @ 90°C
4.5
4
3.5
3
EVM (%)
2.5
2
1.5
1
0.5
0
0
5
Gain (dB), Efficiency (%), EVM (%)
4.5
4
3.5
Id (Amps)
3
2.5
2
1.5
1
0.5
35
30
25
20
15
10
5
0
0
1
Gain, Efficiency, EVM vs. Output Power
Freq=1840 MHz, Vdd=28 V, T
Flange
= 25°C
Gain
Efficiency
EVM
1
2
3
Output Power (W)
4
5
6
2
3
4
5
6
7
8
Output Power (W)
30
25
Gain (dB), EVM (%)
20
15
10
5
0
0
Gain, EVM vs. Output Power and Voltage
Freq=1840 MHz, Vdd=24 V, 28 V, 32 V, T
Flange
= 25°C
Gain (dB), Efficiency (%), EVM (%)
35
30
25
20
15
Gain, Efficiency, EVM vs. Frequency
Freq=1840 MHz, Vdd=28 V, T
Flange
= 25°C
Gain @ 24VDC
Gain @ 28VDC
Gain @ 32VDC
EVM @ 24VDC
EVM @ 28VDC
EVM @ 32VDC
Gain
10
5
0
1790
Efficiency
EVM
2
4
6
Output Power (W)
8
10
12
1800
1810
1820
1830
1840
1850
1860
1870
1880
1890
Frequency (MHz)
Gain, Efficiency vs. Output Power and Temperature
Freq=1840 MHz, Vdd=28 V, T
Flange
=-20°C, 25°C, 90°C
35
30
Gain (dB), Efficiency (%)
25
Two Tone IMD vs. Output Power and Temperature
Freq=1840 MHz, Vdd=28 V, T
Flange
=-20°C, 25°C, 90°C
0
-5
-10
-15
IMD (dBc)
IMD @-20°C
IMD @ 25°C
IMD @ 90°C
20
15
10
5
0
0
1
2
3
4
5
6
7
8
-20
-25
-30
-35
-40
-45
0
1
Gain @-20°C
Gain @ 25°C
Gain @ 90°C
Efficiency @-20°C
Efficiency @ 25°C
Efficiency @ 90°C
Output Power (W)
2
3
Output Power (W)
4
5
6
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
3
http://www.sirenza.com
EDS-102930 Rev C
XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module
Test Board Schematic with module attachments shown
Test Board Bill of Materials
Component
PCB
J1, J2
J3
C1, C10
C2, C20
C3, C30
C25, C26
C21, C22
C23, C24
Mounting
Screws
Description
Rogers 4350,
e
r
=3.5
Thickness=30mils
SMA, RF, Panel Mount Tab W /
Flange
MTA Post Header, 6 Pin, Rect-
angle, Polarized, Surface
Mount
Cap, 10mF, 35V, 10%, Tant,
Elect, D
Cap, 0.1mF, 100V, 10%, 1206
Cap, 1000pF, 100V, 10%, 1206
Cap, 68pF, 250V, 5%, 0603
Cap, 0.1mF, 100V, 10%, 0805
Cap, 1000pF, 100V, 10%, 0603
4-40 X 0.250”
Manufacturer
Rogers
Johnson
AMP
Kemet
Johanson
Johanson
ATC
Panasonic
AVX
Various
Test Board Layout
To receive Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture, contact applications
support at
support@sirenza.com.
Data sheet for evaluation circuit (XD010-EVAL) available from Sirenza website.
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
4
http://www.sirenza.com
EDS-102930 Rev C
XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module
Package Outline Drawing
Recommended PCB Cutout and Landing Pads for the D2F Package
Note 3:
Dimensions are in inches
Refer to Application note AN-060 “Installation Instructions for XD Module Series” for additional mounting info. App note availbale at at www.sirenza.com
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