VS-ST230C Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 410 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case A-PUK (TO-200AB)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
TYPICAL APPLICATIONS
A-PUK (TO-200AB)
• DC motor controls
• Controlled DC power supplies
410 A
PRIMARY CHARACTERISTICS
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
Package
Circuit configuration
400 V, 800 V, 1200 V, 1400 V,
1600 V, 1800 V, 2000 V
1.69 V
90 mA
-40 °C to +125 °C
A-PUK (TO-200AB)
Single SCR
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
410
55
780
25
5700
5970
163
149
400 to 2000
100
-40 to +125
UNITS
A
°C
A
°C
A
kA
2
s
V
μs
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
04
08
12
VS-ST230C..C
14
16
18
20
V
DRM
/V
RRM
, MAXIMUM
REPETITIVE PEAK AND OFF-STATE
VOLTAGE
V
400
800
1200
1400
1600
1800
2000
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
V
500
900
1300
1500
1700
1900
2100
30
I
DRM
/I
RRM,
MAXIMUM
AT T
J
= T
J
MAXIMUM
mA
Revision: 27-Sep-17
Document Number: 94398
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
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VS-ST230C Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Maximum (typical) latching current
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
410 (165)
55 (85)
780
5700
5970
4800
Sinusoidal half wave,
initial T
J
= T
J
maximum
5000
163
148
115
105
1630
0.92
0.98
0.88
0.81
1.69
600
1000 (300)
kA
2
s
V
m
V
mA
kA
2
s
A
UNITS
A
°C
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 880 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
,
t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 300 A, T
J
= T
J
maximum, dI/dt = 20 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
,
t
p
= 500 μs
VALUES
1000
1.0
μs
100
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise
of off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
30
UNITS
V/μs
mA
Revision: 27-Sep-17
Document Number: 94398
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
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VS-ST230C Series
www.vishay.com
Vishay Semiconductors
VALUES
TYP.
2.0
3.0
20
5.0
180
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
90
40
2.9
1.8
1.2
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
10
0.25
-
150
-
-
3.0
-
mA
V
V
mA
MAX.
10.0
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
DC gate current required to trigger
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
I
GT
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, t
p
5 ms
T
J
= - 40 °C
T
J
= 25 °C
T
J
= 125 °C
T
J
= - 40 °C
DC gate voltage required to trigger
DC gate current not to trigger
DC gate voltage not to trigger
V
GT
I
GD
V
GD
T
J
= T
J
maximum
T
J
= 25 °C
T
J
= 125 °C
UNITS
W
A
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating temperature range
Maximum storage temperature range
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
See dimensions - link at the end of datasheet
SYMBOL
T
J
T
Stg
R
thJ-hs
R
thC-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.17
0.08
0.033
0.017
4900
(500)
50
N
(kg)
g
K/W
UNITS
°C
A-PUK (TO-200AB)
R
thJC
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE
0.015
0.018
0.024
0.035
0.060
DOUBLE SIDE
0.017
0.019
0.024
0.035
0.060
RECTANGULAR CONDUCTION
SINGLE SIDE
0.011
0.019
0.026
0.036
0.060
DOUBLE SIDE
0.011
0.019
0.026
0.036
0.061
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 27-Sep-17
Document Number: 94398
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST230C Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heatsink Temperature (°C)
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
0
30°
ST230C..C Series
(Single Side Cooled)
R
thJ-hs
(DC) = 0.17 K/W
130
120
110
100
90
80
70
60
50
40
30
20
30°
ST230C..C Series
(Double Side Cooled)
R
thJ-hs
(DC) = 0.08 K/W
Conduction Period
Conduction Angle
60°
60°
90°
120°
180°
DC
90°
120°
180°
40 80 120 160 200 240 280 320
Average On-state Current (A)
0 100 200 300 400 500 600 700 800
Average On-state Current (A)
Fig. 4 - Current Ratings Characteristics
Fig. 1 - Current Ratings Characteristics
Maximum Allowable Heatsink Temperature (°C)
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
100
30°
ST230C..C Series
(Single Side Cooled)
R
thJ-hs
(DC) = 0.17 K/W
1100
1000
900
800
700
600
500
400
300
200
100
0
0
180°
120°
90°
60°
30°
RMS Limit
Conduction Period
Conduction Angle
60°
90°
120°
180°
DC
ST230C..C Series
T
J
= 125°C
200
300
400
500
100
200
300
400
500
600
Average On-state Current (A)
Fig. 2 - Current Ratings Characteristics
Average On-state Current (A)
Fig. 5 - On-State Power Loss Characteristics
Maximum Allowable Heatsink Temperature (°C)
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
100
30°
1400
1200
1000
800
600
ST230C..C Series
(Double Side Cooled)
R
thJ-hs
(DC) = 0.08 K/W
DC
180°
120°
90°
60°
30°
RMS Limit
Conduction Period
Conduction Angle
60°
90°
120°
180°
400
200
0
0
200
400
600
800
1000
Average On-state Current (A)
Fig. 6 - On-State Power Loss Characteristics
ST230C..C Series
T
J
= 125°C
200
300
400
500
600
Average On-state Current (A)
Fig. 3 - Current Ratings Characteristics
Revision: 27-Sep-17
Document Number: 94398
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST230C Series
www.vishay.com
Vishay Semiconductors
Peak Half Sine Wave On-state Current (A)
Peak Half Sine Wave On-state Current (A)
5500
5000
4500
4000
3500
3000
2500
2000
1
At Any Rated Load Condition And With
Rated Vrrm Applied Following Surge.
Initial Tj = 125°C
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100 s
6500
6000
5500
5000
4500
4000
3500
3000
2500
Maximum Non Repetitive Surge Current
Versus Pulse Train Duration. Control
Of Conduction May Not Be Maintained.
Initial Tj = 125°C
No Voltage Reapplied
Rated Vrrm Reapplied
ST230C..C Series
ST230C..C Series
10
100
2000
0.01
0.1
Pulse Train Duration (s)
1
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
Instantaneous On-state Current (A)
Tj = 25°C
Tj = 125°C
1000
ST230C..C Series
100
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Instantaneous On-state Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
Transient Thermal Impedance Z thJ-hs (K/W)
1
Steady State Value
R
thJ-hs
= 0.17 K/W
(Single Side Cooled)
0.1
R
thJ-hs
= 0.08 K/W
(Double Side Cooled)
(DC Operation)
0.01
ST230C..C Series
0.001
0.001
0.01
0.1
Square Wave Pulse Duration (s)
1
10
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 27-Sep-17
Document Number: 94398
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000