DA9122.002
7 September, 2001
MAS9122
3 Outputs LDO Voltage Regulator IC
•
Three Low Dropout Voltage
Regulators
•
Very Low Noise: 25
µVrms
•
High Ripple Rejection: 63 dB
•
Very Low Crosstalk
•
Low Ground Pin Current
•
Regulator Enable/Disable
Control
DESCRIPTION
MAS9122 is a three output voltage regulator. It is
designed for three different output voltages, which
can be modified through a mask option. Regulators
operating mode is controlled by two enable/disable
pins. The circuit consists of a bandgap voltage
reference, an error amplifier, a current limit circuit
and a thermal protection circuit.
MAS9122 features very low ground pin current:
typically less than 1.5 µA sleep mode current and
typical 125 µA for one regulator in active mode.
Excellent noise and PSRR performance enables the
use of MAS9122 in high precision portable devices.
Low crosstalk between regulators provides an area
efficient solution compared to single regulators.
FEATURES
•
•
•
•
•
•
Three Regulators at 135 mA, 70 mA and 50 mA
Output Options 2.70, 2.85 and 3.00 V, see
Ordering Information p. 12
Low Noise: 20
µVrms
Typical and
30
µVrms
Maximum for All Regulators over
Frequency Range 100 Hz…100 kHz
Fast Dynamic Response
Output Voltage Accuracy <
±2.0
%
MSOP-8 Package
APPLICATION
•
•
•
•
•
Systems Requiring Stabilized Power in
Separate Blocks
Cordless Phones
Mobile Phones
Portable Systems
Battery Powered Systems
BLOCK DIAGRAM
VIN
ENA
&
LDO_A
135 mA
OUT A
&
ENBC
&
LDO_B
70 mA
LDO_C
50 mA
OUT B
OUT C
Temperature
Protection
OR-
gate
&
Bandgap
Reference
VREF
GND
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DA9122.002
7 September, 2001
PIN CONFIGURATION
Top View
OUTA 1
8 OUTB
9122
AXWW
OUTC 2
ENBC 3
ENA
4
7 VIN
6 GND
5 VRF
Top Marking Information:
AX = voltage version, see p.12 Ordering information
WW = week
PIN DESCRIPTION
Pin Name
OUTA
OUTC
ENBC
ENA
VREF
GND
VIN
OUTB
Pin
1
2
3
4
5
6
7
8
Type
O
O
I
I
O
P
P
O
Function
135 mA Regulator Output
50 mA Regulator Output
Enable for Regulators B and C
Enable for Regulator A
Reference Voltage: Pin for Bypass Capacitor
Ground
Positive Supply Voltage
70 mA Regulator Output
G = Ground, I = Input, O = Output, P = Power
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DA9122.002
7 September, 2001
ABSOLUTE MAXIMUM RATINGS
All Voltages with Respect to Ground
Parameter
Supply Voltage
Voltage Range for All Pins
ESD Rating
Junction Temperature
Storage Temperature
Symbol
V
IN
Conditions
Min
−0.3
−0.3
Max
6
V
IN
+ 0.3
2
175
(limited)
Unit
V
V
kV
o
C
o
HBM
T
Jmax
T
S
−55
+150
C
Stresses beyond those listed may cause permanent damage to the device. The device may not operate under these conditions, but will not
be destroyed.
Parameter
Supply Voltage
Operating Junction
Temperature
Operating Ambient
Temperature
Symbol
V
IN
T
J
T
A
Conditions
Min
V
OUT(NOM)
+ 0.25
−40
−40
Max
5.3
+125
+85
Unit
V
°C
°C
ELECTRICAL CHARACTERISTICS
T
A
= -40°C to +85°C, typical values at T
A
= +27°C, V
IN
= 4.5 V, I
OUT
= 1.0 mA, C
IN
= 1.0
µF,
C
L
= 1.0
µF,
C
BYPASS
= 10 nF,
V
CTRL
= 2.0 V, unless otherwise specified.
x
Thermal Protection
Parameter
Threshold High
Threshold Low
Symbol
T
H
T
L
Conditions
Min
130
120
Typ
150
140
Max
170
160
Unit
o
o
C
C
The hysteresis of 10
o
C prevents the device from turning on too soon after thermal shut-down.
x
Control Pin Parameters
Parameter
Input Voltage
ON-state
OFF-state
Symbol
ENA,
ENBC
Conditions
Min
−0.3
2.0
Typ
Max
V
IN
+ 0.3
0.3
Unit
V
If CTRL-pin is not connected, the particular regulator(s) is/are in OFF state (900 kΩ pull-down resistor to ground).
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DA9122.002
7 September, 2001
x
Current Parameters
Parameter
LDO_A Continuous Output Current
LDO_B Continuous Output Current
LDO_C Continuous Output Current
Short Circuit Current for LDO_A
Short Circuit Current for LDO_B
Short Circuit Current for LDO_C
Ground Pin Current
Ground Pin Current
Ground Pin Current
Ground Pin Current
Symbol
I
OUTA
I
OUTB
I
OUTC
I
SHORTA
I
SHORTB
I
SHORTC
I
GND(OFF)
I
GND(ONA)
I
GND(ONBC)
I
GND(ONABC)
Conditions
Min
0
0
0
Typ
Max
135
70
50
Unit
mA
mA
mA
mA
mA
mA
350
265
230
I
OUT
= 0 A, V
ENA,ENBC
< 0.3 V,
V
IN
= 3.6
I
OUT
= 0 A, V
ENA
> 2 V,
V
ENBC
< 0.3 V, V
IN
= 3.6
I
OUT
= 0 A, V
ENA
< 0.3 V,
V
ENBC
> 2 V, V
IN
= 3.6
I
OUT
= 0 A, V
ENA, ENBC
> 2 V
V
IN
= 3.6
2
125
170
245
4
µA
µA
µA
µA
x
Voltage Parameters
Parameter
Output Voltage:
Mask option for 2.85 V
Symbol
V
OUTA
V
OUTA,B,C
Conditions
Max I
OUT
= 135 mA
Max I
OUTA
= 100 mA, Max I
OUTB
=
70 mA, Max I
OUTC
= 50 mA
I
OUTA
= 135 mA
I
OUTA
= 100 mA
I
OUTB
= 70 mA
I
OUTC
= 50 mA
Min
2.85 – 3%
2.85 – 2%
Typ
2.85
2.85
220
180
165
150
Max
2.85 + 2%
2.85 + 2%
Unit
V
V
mV
mV
mV
LDO_A Dropout
Voltage
LDO_B Dropout
Voltage
LDO_C Dropout
Voltage
x
External Capacitors
V
DROPA
V
DROPB
V
DROPC
Parameter
Output Capacitors for
all Regulators
Effective Series Resistance
Bypass Capacitor
x
Power Dissipation
Symbol
C
OUTA,B,C
ESR
C
BYPASS
Conditions
Min
0.8
0.01
Typ
1
0.1
10
Max
Unit
µF
2
Ω
nF
Parameter
Junction to Case Thermal
Resistance
Junction to Ambient Thermal
Resistance
Maximum Power Dissipation
Symbol
R
JC
R
JA
P
d
Conditions
Min
Typ
39
Max
Unit
°C/W
°C/W
mW
typical PC board mounting,
still air
any ambient temperature
206
P
d MAX
=
Note 1
T
J (MAX)
−
T
A
R
JA
Note 1:
T
J(MAX)
denotes maximum operating junction temperature (+125°C), T
A
ambient temperature, and R
JA
junction-to-ambient thermal
resistance (+206°C/W).
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7 September, 2001
x
Load Regulation
Parameter
Load Regulation LDO_A
Load Regulation LDO_B
Load Regulation LDO_C
x
Line Regulation
Symbol
Conditions
0 mA < I
OUT
< 135 mA
0 mA < I
OUT
< 100 mA
0 mA < I
OUT
< 70 mA
0 mA < I
OUT
< 50 mA
Min
Typ
22
22
21
13
Max
50
30
25
22
Unit
mV
mV
mV
Parameter
Line Regulation for all LDOs
x
PSRR
Symbol
Conditions
I
OUT
= I
MAX
,V
IN
from 5.3 V to 3.1 V
Min
Typ
0.40
Max
1.2
Unit
mV
Parameter
PSRR for all LDOs
Symbol
Conditions
I
OUT
= Max I
OUT
V
IN
= 3.6 V
f = 1 kHz
f = 10 kHz
Min
Typ
Max
Unit
dB
47
75
63
x
Noise and Crosstalk
Parameter
Noise Voltage for all LDOs
x
Dynamic Parameters
Symbol
V
NO
Conditions
100 Hz < f < 100 kHz
Min
Typ
25
Max
30
Unit
µVrms
Parameter
Start-up Delay (from enabling
LDO_A to 90% * V
OUT(NOM)
,
other LDOs at ON state)
(Note 2)
Overshoot
Symbol
Conditions
V
ENA
from < 0.3 V to > 2.0 V,
V
ENBC
> 2.0 V, I
OUT
= Max I
OUT
,
C
OUTA
= 1
µF
V
ENA
from < 0.3 V to > 2.0 V,
V
ENBC
> 2.0 V, I
OUT
= Max I
OUT
,
C
OUTA
= 1
µF
V
ENA
from < 0.3 V to > 2.0 V,
V
ENBC
> 2.0 V, I
OUT
= Max I
OUT
,
C
OUTA
= 1
µF,
w/o C
BYPASS
Min
Typ
25
Max
Unit
µs
1
%
µs
Settling Time
(from 90% * V
OUT(NOM)A
to max
±0.1% fluctuation)
200
Note 2:
When all regulators are disabled the start-up delay is a function of a bypass capacitor. Typically 0.5 ms for 10 nF capacitor.
50%
TRL
overshoot
90%
VOUT
start-up delay
settling time
Figure 1.
Definitions of
start-up delay, overshoot
and settling time.
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