19-0230; Rev 3; 3/11
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
_______________General Description
The MAX536/MAX537 combine four 12-bit, voltage-output
digital-to-analog converters (DACs) and four precision
output amplifiers in a space-saving 16-pin package.
Offset, gain, and linearity are factory calibrated to provide
the MAX536’s ±1 LSB total unadjusted error. The
MAX537 operates with ±5V supplies, while the MAX536
uses -5V and +10.8V to +13.2V supplies.
Each DAC has a double-buffered input, organized as
an input register followed by a DAC register. A 16-bit
serial word is used to load data into each input/DAC
register. The serial interface is compatible with either
SPI/QSPI™ or MICROWIRE™, and allows the input and
DAC registers to be updated independently or simulta-
neously with a single software command. The DAC reg-
isters can be simultaneously updated with a hardware
LDAC
pin. All logic inputs are TTL/CMOS compatible.
____________________________Features
♦
Four 12-Bit DACs with Output Buffers
♦
Simultaneous or Independent Control of Four
DACs via a 3-Wire Serial Interface
♦
Power-On Reset
♦
SPI/QSPI and MICROWIRE Compatible
♦
±1 LSB Total Unadjusted Error (MAX536)
♦
Full 12-Bit Performance without Adjustments
♦
±5V Supply Operation (MAX537)
♦
Double-Buffered Digital Inputs
♦
Buffered Voltage Output
♦
16-Pin DIP/SO Packages
MAX536/MAX537
______________ Ordering Information
PART
MAX536ACPE+
MAX536BCPE+
MAX536ACWE+
MAX536BCWE+
MAX536AEPE+
MAX536BEPE+
MAX536AEWE+
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
16 PDIP
16 PDIP
16 Wide SO
16 Wide SO
16 PDIP
16 PDIP
16 Wide SO
INL
(LSB)
±0.5
±1
±0.5
±1
±0.5
±1
±0.5
±1
________________________Applications
Industrial Process Controls
Automatic Test Equipment
Digital Offset and Gain Adjustment
Motion Control Devices
Remote Industrial Controls
Microprocessor-Controlled Systems
________________Functional Diagram
SDO
LDAC
DECODE
CONTROL
INPUT
REG A
INPUT
REG B
INPUT
REG C
INPUT
REG D
SR
CONTROL
CS
SCK
REFCD
DAC
REG A
DAC
REG B
DAC
REG C
DAC
REG D
V
DD
DGND
V
SS
TP REFAB
AGND
MAX536BEWE+
-40°C to +85°C
16 Wide SO
+Denotes
a lead(Pb)-free/RoHS-compliant package.
Ordering Information continued at end of data sheet.
__________________Pin Configuration
TOP VIEW
OUTA
MAX536/MAX537
DAC A
+
OUTB
1
16
OUTC
15
OUTD
14
V
DD
OUTA
2
V
SS
3
OUTB
DAC B
OUTC
DAC C
OUTD
16-BIT
SHIFT
REGISTER
AGND
4
REFAB
5
MAX536
MAX537
13
TP
12
REFCD
11
SDO
10
SCK
9
CS
DAC D
DGND
6
LDAC
7
SDI
8
SDI
DIP/SO
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
MAX536/MAX537
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND or DGND
MAX536 ............................................................-0.3V to +13.2V
MAX537 .................................................................-0.3V to +7V
V
SS
to AGND or DGND ............................................-7V to +0.3V
SDI, SCK ,
CS, LDAC,
TP, SDO
to AGND or DGND..................................-0.3V to (VDD + 0.3V)
REFAB, REFCD to AGND or DGND ..........-0.3V to (VDD + 0.3V)
OUT_ to AGND or DGND ..........................................VDD to VSS
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) .................842mW
Wide SO (derate 9.52mW/°C above +70°C).................762mW
Operating Temperature Ranges
MAX53_AC_E/BC_E.............................................0°C to +70°C
MAX53_AE_E/BE_E ..........................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX536
(V
DD
= +12V, V
SS
= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, R
L
= 5kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Resolution
SYMBOL
N
T
A
= +25°C
Total Unadjusted Error (Note 1)
TUE
T
A
= T
MIN
to T
MAX
MAX536A
MAX536B
MAX536AC
MAX536BC
MAX536AE
MAX536BE
Integral Nonlinearity
Differential Nonlinearity
INL
DNL
MAX536A
MAX536B
Guaranteed monotonic
T
A
= +25°C
Offset Error
T
A
= T
MIN
to T
MAX
MAX536A
MAX536B
MAX536AC
MAX536BC
MAX536AE
MAX536BE
R
L
=
∞
Gain Error
V
DD
Power-Supply Rejection
Ratio
V
SS
Power-Supply Rejection Ratio
R
L
= 5kΩ
PSRR
PSRR
MAX536_C/E
MAX536_M
±0.02
±0.03
-0.1
-0.6
±0.15
CONDITIONS
MIN
12
±1.0
±2.0
±2.0
±3.0
±2.5
±3.5
±0.50
±1
±1
±2.5
±5.0
±5.0
±7.5
±6.1
±8.5
±1.0
±1.5
±2.0
±0.125
±0.30
LSB/V
LSB/V
LSB
mV
LSB
LSB
LSB
TYP
MAX
UNITS
Bits
STATIC PERFORMANCE—ANALOG SECTION
T
A
= +25°C, 10.8V < V
DD
< 13.2V
T
A
= +25°C, -5.5V < V
DD
< -4.5V
2
____________________________________________________________________________________________________
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX536 (continued)
(V
DD
= +12V, V
SS
= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, R
L
= 5kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
MAX536A
MAX536B
±0.1
MAX536A
MAX536B
INL
REF
R
REF
Code dependent, minimum at code 555
V
REF
= 2V
P-P
Input code =
all 0s
THD+N
V
REF
= 10V
P-P
at 400Hz
V
REF
= 10V
P-P
at 4kHz
0
5
700
-100
-82
0.024
%
±1.2
±1.2
±0.2
CONDITIONS
MIN
TYP
MAX
±1.0
±2.0
±1.0
±2.5
±5.0
±1.0
V
DD
- 4
UNITS
MAX536/MAX537
MATCHING PERFORMANCE (T
A
= +25°C)
Total Unadjusted Error
Gain Error
Offset Error
Integral Nonlinearity
REFERENCE INPUT
Reference Input Range
Reference Input Resistance
Reference 3dB Bandwidth
Reference Feedthrough
Total Harmonic Distortion Plus
Noise
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance (Note 2)
DIGITAL OUTPUT (SDO)
Output Low Voltage
Output Leakage Current
Voltage Output Slew Rate
Output Settling Time
Digital Feedthrough
Digital Crosstalk (Note 3)
POWER SUPPLIES
Positive Supply Range
Negative Supply Range
Positive Supply Current
(Note 4)
Negative Supply Current
(Note 4)
V
DD
V
SS
I
DD
I
SS
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
-6
10.8
-4.5
8
13.2
-5.5
18
25
-16
-23
V
V
mA
mA
V
REF
= 5V
To ±0.5 LSB of full scale
V
OL
SDO sinking 5mA
SDO = 0V to V
DD
5
3
5
8
0.13
0.40
±10
V
µA
V/µs
µs
nV-s
nV-s
V
kΩ
kHz
dB
TUE
LSB
LSB
mV
LSB
MULTIPLYING-MODE PERFORMANCE
V
REF
= 2.0V
P-P
at 50kHz
DIGITAL INPUTS (SDI, SCK,
CS, LDAC)
V
IH
V
IL
V
IN
= 0V or V
DD
2.4
0.8
1.0
10
V
V
µA
pF
DYNAMIC PERFORMANCE (RL = 5kΩ, CL = 100pF)
_______________________________________________________________________________________
3
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
MAX536/MAX537
ELECTRICAL CHARACTERISTICS—MAX536 (continued)
(V
DD
= +12V, V
SS
= -5V, REFAB/REFCD = 8V, AGND = DGND = 0V, R
L
= 5kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Internal Power-On Reset
Pulse Width (Note 2)
SCK Clock Period
SCK Pulse Width High
SCK Pulse Width Low
CS
Fall to SCK Rise
Setup Time
SCK Rise to
CS
Rise
Hold Time
SDI Setup Time
SDI Hold Time
SCK Rise to SDO Valid
Propagation Delay (Note 6)
SCK Fall to SDO Valid
Propagation Delay (Note 7)
CS
Fall to SDO Enable
(Note 8)
CS
Rise to SDO Disable
(Note 9)
SCK Rise to
CS
Fall Delay
CS
Rise to SCK Rise
Hold Time
LDAC
Pulse Width Low
CS
Pulse Width High
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (Note 5)
t
POR
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
DO2
t
DV
t
TR
t
CS0
t
CS1
t
LDAC
t
CSW
Continuous SCK, SCK edge ignored
SCK edge ignored
20
20
30
40
1kΩ pullup on SDO
to V
DD,
C
LOAD
= 50pF
1kΩ pullup on SDO
to V
DD,
C
LOAD
= 50pF
SDO high
SDO low
SDO high
SDO low
100
30
30
20
10
40
0
78
50
81
53
27
40
105
80
110
85
45
60
26
20
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TUE is specified with no resistive load.
Guaranteed by design.
Crosstalk is defined as the glitch energy at any DAC output in response to a full-scale step change on any other DAC.
Digital inputs at 2.4V; with digital inputs at CMOS levels, I
DD
decreases slightly.
All input signals are specified with t
R
= t
F
≤
5ns. Logic input swing is 0 to 5V.
Serial data clocked out of SDO on SCK’s falling edge. (SDO is an open-drain output for the MAX536. The MAX537’s SDO
pin has an internal active pullup.)
Note 7:
Serial data clocked out of SDO on SCK’s rising edge.
Note 8:
SDO changes from High-Z state to 90% of final value.
Note 9:
SDO rises 10% toward High-Z state.
4
_______________________________________________________________________________________
Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX537
(V
DD
= +5V, V
SS
= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, R
L
= 5kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Resolution
Integral Nonlinearity
Differential Nonlinearity
SYMBOL
N
INL
DNL
MAX537A
MAX537B
Guaranteed monotonic
T
A
= +25°C
Offset Error
T
A
= T
MIN
to T
MAX
MAX537A
MAX537B
MAX537AC
MAX537BC
MAX537AE
MAX537BE
Gain Error
V
DD
Power-Supply Rejection Ratio
V
SS
Power-Supply Rejection Ratio
Gain Error
Offset Error
Integral Nonlinearity
REFERENCE INPUT
Reference Input Range
Reference Input Resistance
Reference 3dB Bandwidth
REF
RREF
Code dependent, minimum at code 555 hex
V
REF
= 2V
P-P
V
REF
= 10V
P-P
at
Reference Feedthrough
Input code = all 0s
400Hz
V
REF
= 10V
P-P
at
4kHz
Total Harmonic Distortion Plus
Noise
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance (Note 2)
THD+N
V
REF
= 850mV
P-P
at 100kHz
0
5
700
-100
dB
-82
0.024
%
V
DD -
2.2
V
kΩ
kHz
INL
MAX537A
MAX537B
PSRR
PSRR
R
L
=
∞
RL = 5kΩ
T
A
= +25°C, 4.5V
≤
V
DD
≤
5.5V
T
A
= +25°C, -5.5V
≤
V
SS
≤
-4.5V
-0.3
-0.8
±0.01
±0.02
±0.1
±0.3
±0.3
±0.35
CONDITIONS
MIN
12
±0.15
±0.50
±1
±1
±3.0
±6.0
±6.0
±9.0
±7.0
±11.0
±1.5
±3.0
±0.5
±0.7
±1.25
±3.0
±6.0
±1.0
LSB
LSB/V
LSB/V
LSB
mV
LSB
mV
TYP
MAX
UNITS
Bits
LSB
LSB
MAX536/MAX537
STATIC PERFORMANCE—ANALOG SECTION
MATCHING PERFORMANCE (T
A
= +25°C)
MULTIPLYING-MODE PERFORMANCE
DIGITAL INPUTS (SDI, SCK, CS, LDAC)
V
IH
V
IL
V
IN
= 0V or V
DD
2.4
0.8
1.0
10
V
V
µA
pF
_______________________________________________________________________________________
5
电源技术
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
