T H AT
Corporation
FEATURES
·
High CMRR: typ. 90 dB at 60 Hz
·
Extremely high common-mode input
impedance
InGenius
High-CMRR
Balanced Input Line Receiver ICs
THAT
1200, 1203, 1206
APPLICATIONS
·
Balanced Audio Line Receivers
·
Instrumentation Amplifiers
·
Differential Amplifiers
·
Transformer Front-End Replacements
·
ADC Front-Ends
·
Maintains balance under real-world
conditions
·
Transformer-like performance in an IC
·
Excellent audio performance
·
Wide bandwidth: typ. > 22 MHz
·
High slew rate: typ. 12 V/us
·
Low distortion: typ. 0.0005 % THD
·
Low noise: typ. -107 dBu
·
Several gains: 0 dB, -3 dB, & -6 dB
Description
The THAT 1200-series InGenius balanced line
receivers overcome a serious limitation of
conventional balanced input stages: poor common
mode rejection in real-world applications. While
conventional input stages measure well in the lab
and perform well on paper, they fail to live up to
their CMRR specs when fed from even slightly
unbalanced source impedances — a common
situation in almost any pro sound environment.
This is because conventional stages have low
common-mode input impedance, which interacts
with imbalances in source impedance to unbalance
common-mode signals, making them indistin-
guishable from desired, balanced signals.
Developed by Bill Whitlock of Jensen
Transformers, the patented InGenius input
stage uses clever bootstrapping to raise its
common-mode input impedance into the meg-
ohm range without the noise penalty from the
obvious solution of using high-valued resistors.
Like transformers, InGenius line receivers
maintain their high CMRR over a wide range of
source impedance imbalances — even when fed
from single-ended sources. But unlike trans-
formers, these wide bandwidth solid state de-
vices offer dc-coupling, low distortion, and
transparent sound in a small package at rea-
sonable cost.
Pin Name
R6
IN-
R7
OA1
+1
R10
24K
OA4
+1
R8
IN+
R9
+1
OA2
R5
24K
CM IN
CM OUT
REF
R11
24K
OA3
+
R3
R4
R1
R2
Vcc
Vee
Vout
DIP Pin
1
2
3
4
5
6
7
8
SO Pin
1
2
3
4
5
6
7
8
Ref
In-
In+
Vee
CM In
Vout
Vcc
CM Out
-
Table 1. 1200-series pin assignments
Cb
Part no.
THAT1200
THAT1203
THAT1206
R6 , R9
0
7
k
Ù
7
k
Ù
R7 , R8
24 kÙ
17
k
Ù
17
k
Ù
R1 , R3
6 kÙ
6
k
Ù
7
k
Ù
R2 , R4
6 kÙ
6
k
Ù
5
k
Ù
Gain
0 dB
-3 dB
-6 dB
Plastic DIP
1200P
1203P
1206P
Plastic SO
1200S
1203S
1206S
Figure 1. THAT1200-series equivalent circuit diagram
Table 2. Ordering information
Protected under U.S. Patent Numbers, 5,568,561 and 6,160,451. Additional patents pending.
InGenius is a registered trademark of THAT Corporation.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
600033 Rev 00
Page 2
InGenius High-CMRR Balanced Input Line Receiver ICs
SPECIFICATIONS
1
Absolute Maximum Ratings (T
A
= 25°C)
Positive Supply Voltage (V
CC
)
Negative Supply Voltage (V
EE
)
Storage Temperature Range (T
ST
)
Output Short-Circuit Duration (t
SH
)
+20 V
-20 V
-40 to +125°C
Continuous
THAT1200
Input Voltage (V
IN
)
±
25 V
θ
Ja
θ
Ja
PDIP Pkg
SO Pkg
86
°C/W
104
°C/W
0 to +85°C
125°C
Operating Temperature Range (T
OP
)
Junction Temperature (T
J
)
THAT1203
± 31 V
THAT1206
± 31 V
Electrical Characteristics
Parameter
Supply Current
Supply Voltage
Input Bias Current
Symbol
I
CC
V
CC
, V
EE
I
B
No signal; Either input
connected to GND
No signal
Conditions
No signal
2,3,4
Min
—
±3
—
Typ
4.7
Max
8.0
±18
Units
mA
V
nA
700
1,400
Input Offset Current
Input Voltage Range
I
B-OFF
V
IN-CM
V
IN-DIFF
—
—
±13.0
21.5
24.5
24.5
48.0
with bootstrap
10.0
3.2
±300
—
—
—
—
nA
V
dBu
dBu
dBu
kΩ
MΩ
MΩ
Common mode
±12.5
Differential (equal and opposite swing)
THAT 1200
21.0
THAT 1203
24.0
THAT 1206
24.0
Differential
Common mode
60 Hz
20 kHz
Matched source impedances; V
CM
= ±10V
DC
70
60 Hz
70
20 kHz
—
Input Impedance
Z
IN-DIFF
Z
IN-CM
Common Mode Rejection Ratio
CMRR
1
90
90
85
—
—
—
dB
dB
dB
Common Mode Rejection Ratio CMRR
IEC
5
10Ω unmatched source impedances; V
CM
= ±10V
DC
—
90
60 Hz
—
90
20 kHz
—
85
600Ω unmatched source impedances; V
CM
= ±10V
60 Hz
—
70
20 kHz
—
65
At 60 Hz, with V
CC
= -V
EE
THAT1200
THAT1203
THAT1206
—
—
—
dB
dB
dB
Common Mode Rejection Ratio
CMRR
2
—
—
dB
dB
Power Supply Rejection Ratio
6
PSRR
—
—
—
82
80
80
—
—
—
dB
dB
dB
1.
2.
3.
4.
All specifications are subject to change without notice.
Unless otherwise noted, T
A
=25°C, V
CC
= +15V, V
EE
= -15V
See test circuit in Figure 2.
0 dBu = 0.775Vrms.
5. Per IEC Standard 60268-3 for testing CMRR of balanced
inputs.
6. Defined with respect to the differential gain.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
600033 Rev 00
Page 3
Electrical Characteristics (Cont’d)
Parameter
Total Harmonic Distortion
Symbol
THD
Conditions
Min
Typ
Max
Units
V
IN-DIFF
= 10 dBu; BW = 20 kHz; f = 1 kHz
R
L
=2 kΩ
—
BW = 20 kHz
THAT1200
THAT1203
THAT1206
No signal
R
L
= 2 kΩ; C
L
= 300 pF
R
L
= 10 kΩ; C
L
= 10 pF
THAT1200
THAT1203
THAT1206
f = 1 kHz; R
L
= 2 kΩ
At max differential input
THAT1200
THAT1203
THAT1206
R
L
= R
Lcm
= 0
Ω
At CM output
0.0005
—
%
Output Noise
e
n(OUT)
—
—
—
—
7
-106
-105
-107
—
12
—
—
—
±10
—
dBu
dBu
dBu
mV
V/µs
Output Offset Voltage
Slew Rate
Small Signal Bandwidth
V
OFF
SR
BW
-3dB
—
—
—
—
22
27
34
0
—
—
—
±0.05
MHz
MHz
MHz
dB
Output Gain Error
Maximum Output Voltage
G
ER(OUT)
V
O
21
21
18
—
—
2
10
—
—
21.5
21.5
18.5
±25
±10
—
—
—
—
—
—
—
—
—
—
—
300
50
dBu
dBu
dBu
mA
mA
kΩ
kΩ
pF
pF
Output Short Circuit Current
I
SC
I
CMSC
Minimum Resistive Load
R
Lmin
R
LCMmin
C
Lmax
C
LCMmax
At CM output
Maximum Capacitive Load
At CM output
Cb
+
R5
100R
CM Out
Gnd
In-
220u
R3
600R
Vcc
2
8
C4
C1
56p
In+
In-
R1
200k
R2
200k
7
100n
CMout
Vcc
5
Out
CMin
Ref
6
Vee
3
1
In+
4
U1
R6
100R
R4
2k
C2
300p
Main Out
Gnd
C3
100n
Ext. DC Source
Gnd
Vee
THAT120x
Figure 2. THAT1200-series test circuit
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
Page 4
InGenius High CMRR-Balanced Input Line Receiver IC
Theory of Operation
The InGenius concept was invented to overcome
limitations of traditional approaches to active input
stage design. Because of the many misconceptions
about the performance of conventional input stages,
and to set the stage for discussion of InGenius, we
will begin by discussing conventional approaches.
The Impact of Driving Source Impedance
However, in the real world, where sources have
non-zero output impedance, the situation is more
complicated. Figure 4 shows the equivalent circuit of
a real-world differential application. In this case, the
source connected to the differential receiver has
source impedance of R
s+
in the positive side, and R
s-
in the negative side. Because these two resistive ele-
ments are in series with each other, they only serve to
attenuate the signal V
diff
relative to the input imped-
ance of the differential stage. Even if they (Rs+ and
Rs-) are mismatched, this attenuation is the only con-
sequence of non-zero source impedance.
Vin-
R1
R2
-
Vdiff
R3
Vin+
+
R4
Vout
Rs-
Vdiff
+
2
Vin-
R1
R2
-
-
+
R3
Vin+
R4
Vout
+
Figure 3. Basic differential amplifier
Vdiff
-
2
Rs+
Traditional Balanced Input Stages
The typical balanced input stage used in most
professional audio products is shown in figure 3. It
amplifies differential signals but rejects com-
mon-mode interference based on the precision of the
match in the ratios R
2
/R
1
and R
4
/R
3
. In this circuit,
V
out
=
(
V
in
+
)(1
+
R
2
R
4
R
1
)
(
R
3
+
R
4
)
Figure 4. Basic differential amplifier showing
mismatched source impedances
+
(
V
in
−
)
R
2
1
R
In modern integrated circuits (such as the THAT
1240 series), these resistor ratios are trimmed (usu-
ally with a laser) to extreme precision, resulting in
typical match of
±0.005%.
So, one can assume that
R
2
/R
1
=R
4
/R
3
. In this case, we can simplify this for-
mula as follows:
V
out
=
(
V
in
+
)(1
+
yielding:
V
out
=
[
(
V
in
+
)
+
(
V
in
−
)
]
R
R
2
1
R
2
R
2
R
1
)(
R
1
)
1
(1
+
R
2
R
1
)
+
(
V
in
−
)
R
R
2
1
However, the same cannot be said for com-
mon-mode interference. Common-mode signals ap-
pear
in
phase between the two input terminals. For
in-phase signals, the source impedances can have
significant impact. As shown in Figure 5, this is be-
cause each leg of the source impedance forms a volt-
age divider when it interacts with the input
impedance of its respective input of the differential
amplifier.
Because the + and - inputs of the operational am-
plifier are forced by feedback to maintain the same
voltage, the individual common-mode impedances of
each side of the differential stage are:
Z
CM
+
=
R
3
+
R
4
; and
CMRR Depends on Resistor Match
When driven from a theoretical, true voltage
source, the precisely matched resistor ratios deliver
extremely high CMRR. With perfectly matched resis-
tor ratios, for V
in+
=-V
in-
(this corresponds to a pure
differential input signal), then V
out
=2*(V
in+
)*R
2
/R
1
.
On the other hand, for V
in+
=V
in-
(this corresponds to
a pure common mode signal), then V
out
=0. This pro-
duces an infinite common mode rejection ratio. Any
difference between the ratios R
2
/R
1
and R
4
/R
3
will
lead to less than perfect CMRR.
Z
CM
−
=
R
3
+
R
4
R
3
R
1
.
So long as R
1
=R
3
, these impedances, which form
a load for common-mode input signals, are identical.
(This is why, in discrete applications, it is wise to
choose R
1
=R
3
, and why, in all integrated applica-
tions, these resistors are chosen to be the same
value.)
The total common-mode input impedance is
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
600033 Rev 00
Page 5
Z
CM
=
R
3
+
R
4
R
3
1
+
R
1
.
In-
Ri1
Source Impedance Mismatches Ruin Good CMRR
Even if R
1
perfectly matches R
3
, any mismatch in
the source impedances R
S+
and R
S-
will cause the
voltage dividers to be unequal between the two input
legs. This means that V
in-
and V
in+
in Figure 5 are no
longer equal to each other. Essentially, imbalances in
the two source impedances convert the common
mode signal to a differential signal, which will not be
rejected by the input stage no matter how high its
theoretical CMRR is.
To see how this plays out in practice, consider the
case of a typical unity-gain conventional balanced line
receiver with common-mode input impedance of
10 kΩ. In such cases, a source impedance imbalance
of only 10
Ω
can degrade CMRR to no better than
66 dB. A 10
Ω
mismatch could be caused by toler-
ances in coupling capacitors or output build-out re-
sistors. The situation becomes much worse when a
conventional balanced line receiver is driven from an
unbalanced source, where it is common to use at
least 100
Ω
in series with the output for protection.
(With a 100
Ω
unbalanced output impedance, and a
10 kΩ common-mode input impedance, even a
per-
fect
simple input stage can provide no more than
46 dB CMRR!)
+
OA1
R1
R2
-
In+
Ri2
OA2
+
-
R3
OA3
+
R4
-
Out
Figure 6. Instrumentation amplifier
put impedance (both common-mode and differential)
of the stage because the load seen by the source is
decoupled by OA
1
and OA
2
from the balanced stage
(OA
3
along with R
1
, R
2
, R
3
, and R
4
). In this circuit,
Z
CM- = Ri1
, and Z
CM+
= R
i2
.
To retain 90 dB CMRR in the face of a 10
Ω
mis-
match in source impedance would require R
i1
and
R
i2
to be > 317 kΩ. Of course, any difference in the
values of R
i1
and R
i2
themselves would further unbal-
ance common mode signals as well, so these resis-
tors would ideally be trimmed just like the resistors
in the single opamp stage of Figure 3. Unfortunately
for this approach, it is difficult and expensive to
make precision trimmed resistors with such high val-
ues.
Furthermore, since the input bias current for am-
plifiers OA
1
and OA
2
flows through these resistors,
their input currents must be extremely low if they are
not to cause significant offsets. Practically, this neces-
sitates using FET input stages for OA
1
and OA
2
.
While FETs may be a viable alternative, it is difficult
to achieve with them the low noise performance of
modern bipolar input stages.
Transformer Input Stages
From the point of view of common mode input
impedance, as well as that of electrical isolation, a
transformer in front of the first active input stage is
really the best possible solution. Transformers are
the only approach of which we are aware that pro-
vides true electrical isolation with reasonable fidelity.
Furthermore, their common-mode input impedance
is easily extremely high (tens of Megohms), and al-
most completely decoupled from their differential in-
put impedance.
But, transformers have many other limitations.
They do not offer dc coupling, and suffer from satu-
ration at low frequencies unless they are physically
large and carefully made. Again, unless they are
carefully made (which usually equates to high cost),
they introduce phase shift at high audio-band fre-
quencies. Furthermore, they tend to be big and
heavy and pick up external magnetic fields, some-
Rs-
Vin-
R1
R2
-
Zcm
Vcm
Zcm-
+
Vout
Rs+
Vin+
Zcm+
R3
R4
Figure 5. Basic differential amplifier driven
by common-mode input signal
The best solution to this problem is to increase
the line receiver's common-mode input impedance
enough to minimize the unbalancing effect of the volt-
age divider. Preferably, this means achieving input
impedances on the order of several megohms. How-
ever, in a conventional differential amplifier, this re-
quires high-value resistances in the circuit. High
resistance carries with it a high noise penalty, making
this straightforward approach impractical for quality
audio devices.
Instrumentation Amplifiers
Some designers prefer the more elaborate ap-
proach of an instrumentation amplifier, as shown in
Figure 6. In this circuit, it is possible to raise the in-
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
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