HANBit
HMS1M32M8S
HAN
BIT
High-Speed SRAM MODULE 4Mbyte(1M x 32-Bit)
Part No.
HMS1M32M8S, HMS1M32Z8S
GENERAL DESCRIPTION
The HMS1M32M8S is a high-speed static random access memory (SRAM) module containing 1,048,576 words
organized in a x32-bit configuration. The module consists of eight 512K x 8 SRAMs mounted on a 72-pin, double-
sided, FR4-printed circuit board.
The HMS1M32M8S also support low data retention voltage for battery back-up operations with low data retention
current. Eight chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1, /CE_LL1, /CE_UU2, /CE_UM2, /CE_LM2,
/CE_LL2) are used to enable the module’s 4 bytes independently. Output enable (/OE) and write enable(/WE) can
set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be
powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible
FEATURES
Part identification
- HMS1M32M8S : SIMM design
- HMS1M32Z8S : ZIP design
Pin-Compatible with the HMS1M32M8S
Vss
A3
A2
A1
A0
Vcc
A11
/OE
A10
Vcc
/CE_LL2
/CE_LL1
DQ7
DQ0
DQ1
DQ2
DQ6
DQ5
DQ4
DQ3
A15
A17
/WE
A13
Vcc
DQ8
DQ9
DQ10
/CE_LM2
Vcc
/CE_LM1
DQ15
DQ14
DQ13
DQ12
DQ11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
PIN ASSIGNMENT
A18
A16
Vss
A6
Vcc
A5
A4
Vcc
/CE_UM2
/CE_UM1
DQ23
DQ16
DQ17
DQ18
DQ22
DQ21
DQ20
DQ19
Vcc
A14
A12
A7
Vcc
A8
A9
DQ24
DQ25
DQ26
/CE_UU2
/CE_UU1
DQ31
DQ30
DQ29
DQ28
DQ27
Vss
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Access times : 10, 12, 15, 17 and 20ns
High-density 4MByte design
High-reliability, high-speed design
Single + 5V
±0.5V
power supply
All inputs and outputs are TTL-compatible
FR4-PCB design
72-Pin SIMM Design
OPTIONS
Timing
10ns access
12ns access
15ns access
17ns access
20ns access
MARKING
-10
-12
-15
-17
-20
M
Packages
72-pin SIMM
SIMM
TOP VIEW
1
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8S
FUNCTIONAL BLOCK DIAGRAM
DQ 0-DQ31
DQ 0-31
A0-A19
A0-18
DQ 32
A20
A0-19
DQ24-31
/WE
/OE
/CE-UU1
A0-19
/WE
/OE
/CE-UU2
DQ24-31
U1
/CE
U5
/CE
A0-19
DQ16-23
/WE
/OE
/CE-UM1
A0-19
DQ 8-15
/WE
/OE
/CE-LM1
A0-19
DQ16-23
/WE
/OE
/CE-UM2
A0-19
DQ 8-15
/WE
/OE
/CE-LM2
U2
/CE
U6
/CE
U3
/CE
U7
/CE
A0-19
/WE
/OE
DQ 0-7
/WE
/OE
/WE
/OE
A0-19
DQ 0-7
/WE
/OE
U4
/CE
U8
/CE
/CE-LL1
/CE-LL2
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE or ERASE
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
DQ
HIGH-Z
HIGH-Z
Q
D
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
2
HANBit Electronics Co.,Ltd.
HANBit
NOTE: X means don’t care
HMS1M32M8S
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
RATING
-0.5V to +7.0V
-0.5V to +7.0V
8W
-55oC to +125oC
Operating Temperature
T
A
0oC to +70oC
Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
*
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
4.5V
0
2.2
-0.5*
( TA=0 to 70 o C )
TYP.
5.0V
0
-
-
MAX
5.5V
0
Vcc+0.5V**
0.8V
V
IL
(Min.) = -2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
**
V
IH
(Max.) = Vcc+2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
DC AND OPERATING CHARACTERISTICS (1)
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
* Vcc=5.0V, Temp=25 oC
SYMBO
L
IL
I
IL
0
V
OH
V
OL
TEST CONDITIONS
V
IN
= Vss to Vcc
/CE=V
IH or /
OE =V
IH
or /WE=V
IL
V
OUT
=Vss to V
CC
I
OH
= -4.0mA
I
OL
= 8.0mA
MIN
-2
-2
2.4
MAX
2
2
-
0.4
UNITS
µA
µA
V
V
3
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8S
DC AND OPERATING CHARACTERISTICS (2)
MAX
DESCRIPTION
Power Supply
Current: Operating
Power Supply
Current: Standby
TEST CONDITIONS
Min. Cycle, 100% Duty
/CE=V
IL
, V
IN
=V
IH
or V
IL
,
I
OUT
=0mA
Min. Cycle, /CE=V
IH
f=0MHZ, /CE
≥
V
CC
-0.2V,
V
IN
≥
V
CC
-0.2V or V
IN
≤
0.2V
SYMBOL
l
CC
l
SB
l
SB1
-15
170
50
10
-17
165
50
10
-20
160
50
10
UNIT
mA
mA
mA
CAPACITANCE
DESCRIPTION
Input /Output Capacitance
Input Capacitance
TEST CONDITIONS
V
I/O
=0V
V
IN
=0V
SYMBOL
C
I/O
C
IN
MAX
8
7
UNIT
pF
pF
*
NOTE
: Capacitance is sampled and not 100% tested
AC CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V, unless otherwise specified)
TEST CONDITIONS
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
VALUE
0.V to 3V
3ns
1.5V
See below
Output
+5V
Load
Output Load (B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
+5V
480
Ω
D
OUT
255
Ω
30pF*
D
OUT
255
Ω
480
Ω
5pF*
* Including scope and jig capacitance
4
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8S
READ CYCLE
-15
PARAMETER
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Output
Output Enable to Low-Z Output
Chip Enable to Low-Z Output
Output Disable to High-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
Chip Select to Power Up Time
Chip Select to Power Down Time
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
-17
-20
UNIT
t
RC
t
AA
t
CO
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
OH
t
PU
t
PD
15
-
-
-
0
3
0
0
3
0
-
-
15
15
7
-
-
7
7
-
-
15
17
-
-
-
0
3
0
0
3
0
-
-
17
17
8
-
-
8
8
-
-
17
20
-
-
-
0
3
0
0
3
0
-
-
20
20
9
-
-
9
9
-
-
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE
-15
PARAMETER
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width (/OE=High)
Write Recovery Time (/OE=Low)
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End of Write to Output Low-Z
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
-17
-20
UNIT
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WZ
t
DW
t
DH
t
OW
15
12
0
12
12
0
0
8
0
3
-
-
-
-
-
-
7
-
-
-
17
13
0
13
13
0
0
9
0
3
-
-
-
-
-
-
8
-
-
-
20
14
0
14
14
0
0
10
0
3
-
-
-
-
-
-
9
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
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