HANBit
HMS12864F8VL
SRAM MODULE 1MByte (128K x 64 bit), 120-Pin SMM, 3.3V
Part No. HMS12864F8VL
GENERAL DESCRIPTION
The HMS12864F8VL is a high-speed static random access memory (SRAM) module containing 131,072 words organized in
a x 64-bit configuration. The module consists of eight 128K x 8 SRAMs mounted on a 120-pin, both-sided, FR4-printed circuit
board.
Byte write enable inputs,(/WE0,/WE1,/WE2,/WE3,/WE4,/WE5,/WE6,/WE7) are used to enable the module’s 8 bits
independently. Output enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from
a single +3.3V DC power supply and all inputs and outputs are fully TTL-compatible.
Reading is
FEATURES
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Access times : 70 and 100ns
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High-density 1MByte design
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High-reliability, high-speed design
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Single + 3.3V
±0.3V
power supply
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Easy memory expansion with /CE and
/OE functions
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All inputs and outputs are TTL-compatible
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Industry-standard pin-out
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FR4-PCB design
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Vcc
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
Vcc
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
Vcc
/WE0
/WE1
/WE2
/WE3
/WE4
Vcc
/WE5
/WE6
/WE7
/CS2
Vcc
P1
Symbol
PIN ASSIGNMENT
P2
Symbol
Vss
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Vss
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
Vss
A0
A1
A2
A3
A4
Vss
A5
A6
A7
/CS1
Vss
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
Vcc
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
Vcc
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
Vcc
A16
A15
A14
A13
A12
Vcc
A11
A10
A9
A8
Vcc
PIN
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Symbol
Vss
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
Vss
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
Vss
NC
NC
/OE
NC
NC
Vss
NC
NC
NC
NC
Vss
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
PIN
OPTIONS
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Timing
70ns access
100ns access
MARKING
- 70
-100
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Packages
120-pin SMM
F
1
HANBit Electronics Co.,Ltd.
HANBit
FUNCTIONAL BLOCK DIAGRAM
64
17
A0 - A16
A0-16
DQ 0-7
/CE
/OE
/WE
/WE0
A0-16
DQ 8-15
/CE
/OE
/WE
/WE1
A0-16
DQ16-23
/CE
/OE
/WE
/WE2
A0-16
DQ24-31
/CE
/OE
/CE
/OE
/WE
/WE3
A0-16
A0-16
A0-16
HMS12864F8VL
DQ0
–
DQ63
DQ 32-39
/CE
/OE
/WE
U5
U1
A0-16
DQ 40-47
/CE
/OE
/WE
U2
U6
DQ48-55
/CE
/OE
/WE
U3
U7
DQ56-63
/CE
/OE
/WE
U4
U8
2
HANBit Electronics Co.,Ltd.
HANBit
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
Operating Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
T
A
HMS12864F8VL
RATING
-0.5V to Vcc+0.5V
-0.3V to 4.6V
8.0W
-65oC to +150oC
0oC to +70oC
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Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
( TA=0 to 70 o C )
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
*
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
3.0V
0
2.2
-0.3*
TYP.
3.3V
0
-
-
MAX
3.6V
0
Vcc+0.3V**
0.6V
V
IL
(Min.) = -2.0V ac (Pulse Width
≤
10ns) for I
≤
20 mA
**
V
IH
(Min.) = Vcc+2.0V ac (Pulse Width
≤
10ns) for I
≤
20 mA
DC AND OPERATING CHARACTERISTICS (1)(0
oC
≤
TA
≤
70 oC ; Vcc = 3.3V
±
10% )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
* Vcc=3.3V, Temp=25 oC
TEST CONDITIONS
VIN=Vss to Vcc
/CE=V
IH or /
OE =V
IH
or /WE=V
IL
V
OUT
=Vss to V
CC
I
OH
= -4.0Ma
I
OL
= 8.0mA
SYMBOL
IL
I
IL
0
V
OH
V
OL
MIN
-8
-8
2.4
0.4
MAX
8
8
UNITS
µA
µA
V
V
DC AND OPERATING CHARACTERISTICS (2)
DESCRIPTION
TEST CONDITIONS
Min. Cycle, 100% Duty
/CE=V
IL
, V
IN
=V
IH
or V
IL
,
I
OUT
=0mA
Min. Cycle, /CE=V
IH
f=0MHZ, /CE≥V
CC
-0.2V,
V
IN
≥
V
CC
-0.2V or V
IN
≤0.2V
I
SB
I
SB1
2.4
80
2.4
80
mA
uA
I
CC
32
32
mA
SYMBOL
MAX
70
100
UNIT
Power Supply
Current:Operating
Power Supply
Current:Standby
3
HANBit Electronics Co.,Ltd.
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CAPACITANCE
(TA =25 oC , f= 1.0Mhz)
DESCRIPTION
Input /Output Capacitance
Input Capacitance
TEST CONDITIONS
V
I/O
=0V
V
IN
=0V
SYMBOL
C
I/O
C
IN
HMS12864F8VL
MAX
80
64
UNIT
pF
pF
* NOTE : Capacitance is sampled and not 100% tested
AC CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 3.3V
±
0.3V, unless otherwise specified)
Test conditions
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
VALUE
0.4V to 2.2V
5ns
1.5V
See below
Output Load (B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
Output Load (A)
V
L
=1.5V
+3.3V
50Ω
D
OUT
Z0=50Ω
30pF
D
OUT
353Ω
319Ω
5pF*
READ CYCLE
70
PARAMETER
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Output
Output Enable to Low-Z Output
Chip Enable to Low-Z Output
Output Disable to High-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
Chip Select to Power Up Time
Chip Select to Power Down Time
SYMBOL
MIN
t
RC
t
AA
t
CO
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
OH
t
PU
t
PD
5
10
0
0
10
25
25
70
70
70
35
5
10
0
0
15
30
30
MAX
MIN
100
100
100
50
MAX
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
100
UNIT
4
HANBit Electronics Co.,Ltd.
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WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End of Write to Output Low-Z
SYMBOL
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
MIN
70
60
0
60
55
0
0
30
0
5
25
MAX
HMS12864F8VL
100
MIN
100
80
0
80
70
0
0
40
0
5
30
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(Address
Controlled) ( /CE =/ OE = V
IL
, /WE = V
IH
)
t
RC
Address
t
AA
t
OH
Data out
Previous Data Valid
Data Valid
5
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