HANBit
HAN
BIT
HMS12832M4
SRAM MODULE 512KByte (128K x 32-Bit)
Part No.
HMS12832M4
GENERAL DESCRIPTION
The HMS12832M4 is a high-speed static random access memory (SRAM) module containing 131,072 words
organized in a x32-bit configuration. The module consists of four 128K x 8 SRAMs mounted on a 64-pin, single-
sided, FR4-printed circuit board.
PD0 and PD1 identify the module’s density allowing interchangeable use of alternate density, industry- standard
modules. Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes
independently. Output enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be
powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
PIN ASSIGNMENT
FEATURES
Access times : 12, 15 and 20ns
High-density 512KByte design
High-reliability, high-speed design
Single + 5V
±0.5V
power supply
Easy memory expansion with /CE and /OE functions
All inputs and outputs are TTL-compatible
Industry-standard pinout
FR4-PCB design
Vss
PD0
PD1
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
1
2
3
4
5
6
7
8
/CE4 33
/CE3 34
NC 35
A16 36
/OE 37
Vss 38
DQ24 39
DQ16 40
DQ25 41
DQ17 42
DQ26 43
DQ18 44
DQ27 45
DQ19 46
A3 47
A10 48
A4 49
A11 50
A5 51
A12 52
Vcc 53
A13 54
A6 55
DQ20 56
DQ28 57
DQ21 58
DQ29 59
DQ22 60
DQ30 61
DQ23 62
DQ31 63
Vss 64
9
DQ3 10
DQ11 11
Vcc 12
A0 13
A7 14
A1 15
A8 16
A2 17
A9 18
DQ12 19
DQ4 20
DQ13 21
OPTIONS
Timing
8ns access
10ns access
12ns access
15ns access
20ns access
MARKING
- 8
-10
-12
-15
-20
M
DQ5 22
DQ14 23
DQ6 24
DQ15 25
DQ7 26
Vss 27
/WE 28
A15 29
A14 30
/CE2 31
/CE1 32
Packages
64-pin SIMM
SIMM
TOP VIEW
PD0 = Open
PD1 = Open
1
HANBit Electronics Co.,Ltd.
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FUNCTIONAL BLOCK DIAGRAM
32
DQ0 - DQ31
A0 - A16
17
A0-16
DQ 0-7
/WE
/OE
HMS12832M4
U1
/CE
/CE1
A0-16
DQ 8-15
/WE
/OE
U2
/CE
/CE2
A0-16
DQ16-23
/WE
/OE
U3
/CE
/CE3
A0-16
DQ24-31
/WE
/OE
/WE
/OE
U4
/CE
PRESENCE-DETECT
PD0 = Open
PD1 = Open
/CE4
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
DQ
HIGH-Z
HIGH-Z
Dout
Din
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
2
HANBit Electronics Co.,Ltd.
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ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
HMS12832M4
RATING
-0.5V to Vcc+0.5V
-0.5V to +7.0V
4.0W
-65oC to +150oC
Operating Temperature
T
A
0oC to +70oC
Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
*
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
4.5V
0
2.2
-0.5*
( TA=0 to 70 o C )
TYP.
5.0V
0
-
-
MAX
5.5V
0
Vcc+0.5V**
0.8V
V
IL
(Min.) = -2.0V ac (Pulse Width
≤
10ns) for I
≤
20 mA
**
V
IH
(Min.) = Vcc+2.0V ac (Pulse Width
≤
10ns) for I
≤
20 mA
DC AND OPERATING CHARACTERISTICS (1)
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
10% )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
* Vcc=5.0V, Temp=25 oC
TEST CONDITIONS
V
IN=
Vss to Vcc
/CE=V
IH or /
OE =V
IH
or /WE=V
IL
V
OUT
=Vss to V
CC
I
OH
= -4.0mA
I
OL
= 8.0mA
SYMBO
L
IL
I
IL
0
V
OH
V
OL
MIN
-2
-2
2.4
0.4
MAX
2
2
UNITS
µA
µA
V
V
3
HANBit Electronics Co.,Ltd.
HANBit
HMS12832M4
DC AND OPERATING CHARACTERISTICS (2)
MAX
DESCRIPTION
Power Supply
Current:Operating
Power Supply
Current:Standby
TEST CONDITIONS
Min. Cycle, 100% Duty
/CE=V
IL
, V
IN
=V
IH
or V
IL
,
I
OUT
=0mA
Min. Cycle, /CE=V
IH
f=0MHZ, /CE
≥
V
CC
-0.2V,
V
IN
≥
V
CC
-0.2V or V
IN
≤
0.2V
(TA =25 oC , f= 1.0Mhz)
TEST CONDITIONS
V
I/O
=0V
V
IN
=0V
SYMBOL
C
I/O
C
IN
MAX
8
8
UNIT
pF
pF
SYMBOL
I
CC
I
SB
I
SB1
-12
75
30
5
-15
73
30
5
-20
70
30
5
UNIT
mA
mA
mA
CAPACITANCE
DESCRIPTION
Input /Output Capacitance
Input Capacitance
* NOTE : Capacitance is sampled and not 100% tested
AC CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V, unless otherwise specified)
Test conditions
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
VALUE
0V to 3V
3ns
1.5V
See below
Output
+5V
Load
Output Load (B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
+5V
480
Ω
D
OUT
255
Ω
30pF*
D
OUT
255
Ω
480
Ω
5pF*
READ CYCLE
-12
PARAMETER
Read Cycle Time
Address Access Time
SYMBOL
-15
MAX
MIN
15
12
15
MAX
MIN
20
-20
UNIT
MIN
t
RC
t
AA
12
MAX
ns
20
ns
4
HANBit Electronics Co.,Ltd.
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Chip Select to Output
Output Enable to Output
Output Enable to Low-Z Output
Chip Enable to Low-Z Output
Output Disable to High-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
Chip Select to Power Up Time
Chip Select to Power Down Time
t
CO
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
OH
t
PU
t
PD
0
3
0
0
3
0
-
12
6
6
12
6
0
3
0
0
3
0
15
7
7
15
7
HMS12832M4
20
9
0
3
0
0
3
0
20
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE
-12
PARAMETER
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End of Write to Output Low-Z
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
-15
-20
UNIT
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
12
8
0
8
8
0
0
6
0
3
6
15
10
0
9
9
0
0
7
0
3
7
20
12
0
10
10
0
0
8
0
3
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE
(Address Controlled) ( /CE =/ OE = V
IL
, /WE = V
IH
)
t
RC
Address
t
AA
t
OH
Data out
Previous Data Valid
Data Valid
5
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