HANBit
HMF2M32M8A
FLASH-ROM MODULE 8MByte (2M x 32-Bit), 72pin-SIMM, 5V
Part No. HMF2M32M8A
GENERAL DESCRIPTION
The HMF2M32M8A is a high-speed flash read only memory (FROM) module containing 2,097,152 words organized in a
x32bit configuration. The module consists of eight 1M x 8 FROM mounted on a 72 -pin, double-sided, FR4-printed circuit
board.
The HMF2M32M8A is entirely pin and command set compatible with JEDEC standard 4M -bit EEPROMs. Commands are
written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the
device is similar to reading from 12.0V flash or EPROM devices.
Eight chip enable inputs, (/1CSLL, /2CSLL, /1CSLH, /2CSLH, /1CSHL, /2CSHL, /1CSHH, /2CSHH ) are used to enable the
module’s 4 bytes independently. Output enable (/OE) and write enable (/WE) can set the memory input and output.
When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power
design. All module components may be powered from a single +5V DC power supply and all inputs
and outputs are TTL-compatible.
PIN ASSIGNMENT
FEATURES
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Access time : 75, 90 and 120ns
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High-density 8MByte design
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High-reliability, low-power design
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Single + 5V
±
0.5V power supply
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Easy memory expansion
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All inputs and outputs are TTL-compatible
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FR4-PCB design
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Low profile 72-pin SIMM
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Minimum 1,000,000 write/erase cycle
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Sectors erase architecture
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Sector group protection
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Temporary sector group unprotection
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The used device is Am29F080B
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
- 75
- 90
-120
20
21
22
120ns access
w
Packages
72-pin SIMM
M
23
24
SYMBOL
Vss
NC
D0
D1
D2
D3
D4
D5
D6
VCC
D7
/1CSLL
/2CSLL
D8
D9
D10
D11
D12
D13
D14
D15
/1CSLH
/2CSLH
D16
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
D17
D18
D19
D20
D21
Vcc
D22
D23
/1CSHL
/2CSHL
D24
D25
D26
D27
Vss
D28
D29
D30
D31
/1CSHH
/2CSHH
VCC
/RESET
/OE
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
/WE
A20
A19
A18
A17
A16
A15
A14
A13
A12
Vcc
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A21
A22
Vss
OPTIONS
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Timing
75ns access
90ns access
MARKING
72-PIN SIMM
TOP VIEW
URL: www.hbe.co.kr
REV.02(August,2002)
1
HANBit Electronics Co., Ltd.
HANBit
FUNCTIONAL BLOCK DIAGRAM
D32
A21
HMF2M32M8A
D
DQ 0-31
0-D31
A2-A22
A0-19
A0-20
D0-7
A0-20
D0-7
/
WE
/
OE
/1CSLL
/
WE
/
OE
/2CSLL
U1
/
CE
U5
/
CE
A0-20
D8-15
A0-20
D8-15
/WE
/OE
/
WE
/OE
/1CSLH
U2
/CE
/2CSLH
U6
/CE
A0-20
D16-23
A0-20
D16-23
/WE
/OE
/
WE
/
OE
/1CSHL
U3
/CE
/2CSHL
U7
/
CE
A0-20
/WE
/WE
/OE
D24-31
/WE
A0-20
D24-31
/
OE
U4
/CE
/WE
/
OE
/
OE
U8
/
CE
/2CSHH
/1CSHH
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE or ERASE
URL: www.hbe.co.kr
REV.02(August,2002)
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
DQ
HIGH-Z
HIGH-Z
Q
D
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
HANBit Electronics Co., Ltd.
2
HANBit
NOTE:
X means don’t care
HMF2M32M8A
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage with respect to ground all other pins
Voltage with respect to ground Vcc
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
T
STG
RATING
-2.0V to +7.0V
-2.0V to +7.0V
-65oC to +125oC
Operating Temperature
T
A
-55oC to +125 oC
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Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and fu nctional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Vcc for
±5%
device Supply Voltages
Vcc for
±
10% device Supply Voltages
Ground
SYMBOL
V
CC
Vcc
V
SS
MIN
4.75V
4.5V
0
0
TYP.
MAX
5.25V
5.5V
0
DC AND OPERATING CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V )
PARAMETER
Input Leakage Current
Vcc
Vcc=Vcc max, VOUT= GND to
Output Leakage Current
Vcc
Output High Voltage
Output Low Voltage
Vcc Active Current for
Read(1)
Vcc Active Current for
Program
or Erase(2)
Vcc Standby Current
Low Vcc Lock-Out Voltage
Notes:
1. The Icc current listed is typically less than 2mA/MHz, with /OE at V
IH
.
/CE= V
IH
I
CC3
V
LKO
3.2
40
4.2
µA
V
/CE = V
IL
, /OE=V
IH
I
CC2
320
mA
I
OH
= -2.5mA, Vcc = Vcc min
I
OL
= 12mA, Vcc =Vcc min
/CE = V
IL
, /OE=V
IH
,
V
OH
V
OL
I
CC1
0.85x Vcc
0.45
320
I
L0
TEST CONDITIONS
Vcc=Vcc max, V
IN
= GND to
I
L1
SYMBOL
MIN
MAX
±8.0
UNITS
µA
±8.0
µA
V
V
mA
URL: www.hbe.co.kr
REV.02(August,2002)
3
HANBit Electronics Co., Ltd.
HANBit
2. Icc active while embedded algorithm (program or erase) is in progress
3. Maximum Icc current specifications are tested with Vcc=Vcc max
HMF2M32M8A
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
MIN.
Sector Erase Time
Byte Programming Time
Chip Programming Time
-
-
-
TYP.
1
7
7.2
MAX.
Excludes 00H programming
8
300
21.6
sec
prior to erasure
µs
sec
Excludes system-level overhead
Excludes system-level overhead
UNIT
COMMENTS
CAPACITANCE
PARAMETER
SYMBOL
C
IN
C
OUT
C
IN2
PARAMETER
TEST SETUP
DESCRIPTION
Input Capacitance
Output Capacitance
Control Pin Capacitance
V
IN
= 0
V
OUT
= 0
V
IN
= 0
6
8.5
7.5
7.5
12
9
pF
pF
pF
MIN
MAX
UNIT
Notes
: Test conditions T
A
= 25
o
C, f=1.0 MHz.
AC CHARACTERISTICS
u
Read Only Operations Characteristics
PARAMETER
SYMBOLS
DESCRIPTION
JEDEC
STANDAR
D
t
AVAV
t
AVQV
t
RC
t
ACC
Address to Output Delay
/OE = V
IL
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
CE
t
OE
t
DF
t
DF
Chip Enable to Output Delay
Chip Enable to Output Delay
Chip Enable to Output High-Z
Output Enable to Output High-Z
Output Hold Time From
Addresses,
t
AXQX
t
QH
/CE or /OE, Whichever Occurs
First
Min
0
0
0
ns
/OE = V
IL
Max
Max
Max
Max
70
40
20
20
90
40
20
20
120
50
30
30
ns
ns
ns
ns
Read Cycle Time
/CE = V
IL
Max
70
90
120
ns
Min
70
90
120
ns
TEST SETUP
-75
-90
-120
UNIT
URL: www.hbe.co.kr
REV.02(August,2002)
4
HANBit Electronics Co., Ltd.
HANBit
TEST SPECIFICATIONS
TEST CONDITION
Output load
Output load capacitance,
C
L
(Including jig capacitance)
Input rise and full times
Input pulse levels
Input timing measurement reference levels
Output timing measurement reference levels
75
HMF2M32M8A
ALL OTHERS
1TTL gate
UNIT
30
5
0.0 - 3.0
1.5
1.5
100
20
0.45-2.4
0.8, 2.0
0.8, 2.0
pF
ns
V
V
V
5.0V
IN3064
or Equivalent
Device
Under
C
L
6.2kΩ
Diodes = IN3064
or Equivalent
2.7kΩ
Note
: C
L
= 100pF including jig capacitance
u
Erase/Program Operations
PARAMETER SYMBOLS
JEDEC
STANDARD
t
AVAV
t
AVWL
t
WLAX
t
DVWH
t
WHDX
t
WC
t
AS
t
AH
t
DS
t
DH
t
OES
t
GHWL
t
ELWL
t
WHEH
t
WLWH
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
t
CS
t
CH
t
WP
t
WPH
t
WHWH1
t
WHWH2
t
VCS
DESCRIPTION
Write Cycle Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Output Enable Setup Time
Read Recover Time Before Write
/CE Setup Time
/CE Hold Time
Write Pulse Width
Write Pulse Width High
Byte Programming Operation
Sector Erase Operation (Note1)
Vcc set up time
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Min
40
40
40
-75
70
-90
90
0
45
45
0
0
0
0
0
45
20
7
1
50
50
50
50
-120
120
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
µs
Notes
: 1. This does not include the preprogramming time
2. This timing is only for Sector Protect operations
URL: www.hbe.co.kr
REV.02(August,2002)
5
HANBit Electronics Co., Ltd.
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