HANBit
HMD32M32M16G
128Mbyte (32Mx32) 72-pin Fast Page Mode 4K Ref. SIMM Design 5V
Part No. HMD32M32M16G
GENERAL DESCRIPTION
The HMD32M32M16G is a 32M x 32bit dynamic RAM high-density memory module. The module consists of sixteen
CMOS 16M x 4bit DRAMs in 32-pin TSOPII packages mounted on a 72-pin, double-sided, FR-4-printed circuit board. A
0.1uF decoupling capacitor is mounted on the printed circuit board for each DRAM components. The module is a Single
In-line Memory Module with edge connections and is intended for mounting in to 72-pin edge connector sockets. All
module components may be powered from a single 5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
wPart
Identification
HMD32M32M16G-- 4K Cycles/64ms Ref. Gold
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Access times : 50, 60ns
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High-density 128MByte design
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Single + 5V
±0.5V
power supply
w
JEDEC standard pinout
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Fast Page mode operation
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TTL compatible inputs and outputs
w
FR4-PCB design
PIN
1
2
3
4
5
6
7
8
9
Vss
DQ0
PIN ASSIGNMENT
SYMBOL
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
DQ22
DQ7
DQ23
A7
A11
Vcc
A8
A9
/RAS3
/RAS2
NC
NC
NC
NC
Vss
/CAS0
/CAS2
/CAS3
/CAS1
/RAS0
/RAS1
NC
/WE
NC
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
DQ8
DQ24
DQ9
DQ25
DQ10
DQ26
DQ11
DQ27
DQ12
DQ28
Vcc
DQ29
DQ13
DQ30
DQ14
DQ31
DQ15
NC
PD1
PD2
PD3
PD4
NC
Vss
DQ16
DQ1
DQ17
DQ2
DQ18
DQ3
DQ19
Vcc
NC
A0
A1
A2
A3
A4
A5
A6
A10
DQ4
DQ20
DQ5
DQ21
DQ6
OPTIONS
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Timing
50ns access
60ns access
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Packages
72-pin SIMM
MARKING
-5
-6
M
10
11
12
13
14
15
16
17
tRC
90ns
110ns
18
19
20
21
22
23
PERFORMANCE RANGE
SPEED
-5
-6
tRAC
50ns
60ns
tCAC
13ns
15ns
PRESENCE DETECT PINS
Pin
PD1
PD2
PD3
PD4
50ns
NC
Vss
Vss
Vss
60ns
NC
Vss
NC
NC
24
72 PIN
SIMM TOP VIEW
URL:www.hbe.co.kr
REV.1.0 (August.2002)
-
1
-
HANBit Electronics Co.,Ltd.
HANBit
FUNCTIONAL BLOCK DIAGRAM
/CAS0
/RAS0
/CAS
/RAS
/OE
DQ1
DQ2
DQ3
DQ4
DQ4-DQ7
DQ0-DQ3
DQ1
DQ2
DQ3
DQ4
HMD32M32M16G
U1
U5
/WE
/CAS
/RAS
/OE
A0-A11
/CAS0
/RAS1
/WE A0 -A11
/CAS
/RAS
/OE
/WE
U2
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ1
DQ2
DQ3
DQ4
U6
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS1
/CAS
/RAS
/OE
/WE
U3
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ8-DQ11
DQ1
DQ2
DQ3
DQ4
U7
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS1
DQ12-DQ15
/CAS
/RAS
/OE
/WE
U4
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ16-DQ19
DQ1
DQ2
DQ3
DQ4
U8
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS2
/RAS2
/CAS
/RAS
/OE
/WE
U9
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ20-DQ23
DQ1
DQ2
DQ3
DQ4
U13
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS2
/RAS3
/CAS
/RAS
/OE
/WE
U10
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ24-DQ27
DQ1
DQ2
DQ3
DQ4
U14
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS3
/CAS
/RAS
/OE
/WE
U11
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ28-DQ31
DQ1
DQ2
DQ3
DQ4
U15
/WE
/CAS
/RAS
/OE
A0 -A11
/CAS3
/CAS
/RAS
/OE
/WE
/WE
A0-A11
U12
A0 -A11
DQ1
DQ2
DQ3
DQ4
DQ1
DQ2
DQ3
DQ4
/CAS
U16
/RAS
/OE
/WE A0 -A11
Vcc
Vss
0.1uF Capacitor
for each DRAM
To all DRAMs
URL:www.hbe.co.kr
REV.1.0 (August.2002)
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2
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HANBit Electronics Co.,Ltd.
HANBit
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
SYMBOL
V
IN ,OUT
Vcc
P
D
T
STG
HMD32M32M16G
RATING
-1V to 7.0V
-1V to 7.0V
16W
-55oC to 150oC
Short Circuit Output Current
I
OS
50mA
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Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
( Voltage reference to V
SS
, TA=0 to 70 o C )
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
SYMBOL
Vcc
Vss
V
IH
V
IL
MIN
4.5
0
2.4
-1.0
TYP.
5.0
0
-
-
MAX
5.5
0
Vcc+1
0.8
UNIT
V
V
V
V
DC AND OPERATING CHARACTERISTICS
SYMBOL
I
CC1
-6
I
CC2
I
CC3
-6
-5
I
CC4
-6
I
CC5
I
CC6
-6
I
l(L)
I
O(L)
V
OH
V
OL
I
CC1
: Operating Current * (/RAS , /CAS , Address cycling @t
RC
=min.)
I
CC2
: Standby Current ( /RAS=/CAS=V
IH
)
I
CC3
: /RAS Only Refresh Current * ( /CAS=V
IH
, /RAS, Address cycling @t
RC
=min )
URL:www.hbe.co.kr
REV.1.0 (August.2002)
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3
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HANBit Electronics Co.,Ltd.
SPEED
-5
MIN
-
-
-
-
-
-
-
-
-
-
-10
-5
2.4
-
MAX
1920
1760
32
1920
1760
1120
960
16
1920
1760
10
5
-
0.4
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
V
V
Don’t care
-5
Don’t care
-5
HANBit
I
CC4
: Fast Page Mode Current * (/RAS=V
IL
, /CAS, Address cycling @t
PC
=min )
I
CC5
: Standby Current (/RAS=/CAS=Vcc-0.2V )
I
CC6
: /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @t
RC
=min )
I
IL
: Input Leakage Current (Any input 0V
≤
V
IN
≤
6.5V, all other pins not under test = 0V)
I
OL
: Output Leakage Current (Data out is disabled, 0V
≤
V
OUT
≤
5.5V
V
OH
: Output High Voltage Level (I
OH
= -5mA )
V
OL
: Output Low Voltage Level (I
OL
= 4.2mA )
HMD32M32M16G
* NOTE: I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the
output open. I
CC
is specified as an average current. In I
CC1
and I
CC3
, address cad be changed maximum once
while /RAS=V
IL
. In I
CC4
, address can be changed maximum once within one page mode cycle.
CAPACITANCE
( T
A
=25 C, Vcc = 5V, f = 1Mz )
SYMBOL
C
IN1
C
IN2
C
IN3
C
IN4
C
DQ1
o
o
DESCRIPTION
Input Capacitance (A0-A11)
Input Capacitance (/W)
Input Capacitance (/RAS0)
Input Capacitance (/CAS0-/CAS3)
Input/Output Capacitance (DQ0-31)
MIN
-
-
-
-
-
MAX
90
122
38
38
17
UNITS
pF
pF
pF
pF
pF
AC CHARACTERISTICS
PARAMETER
Random read or write cycle time
Access time from /RAS
Access time from /CAS
Access time from column address
/CAS to output in Low-Z
Output buffer turn-off delay
Transition time (rise and fall)
/RAS precharge time
/RAS pulse width
/RAS hold time
/CAS hold time
/CAS pulse width
/RAS to /CAS delay time
( 0 C
≤
T
A
≤
70oC , Vcc = 5V±10%, See notes 1,2.)
-5
SYMBOL
MIN
t
RC
t
RAC
t
CAC
t
AA
t
CLZ
t
OFF
t
T
t
RP
t
RAS
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
ASR
3
3
1
30
50
13
38
8
20
15
5
0
-
4
-
-6
UNIT
MIN
104
50
13
25
3
13
50
3
1
40
10K
60
15
45
10K
37
25
10
20
15
5
0
10K
45
30
10K
15
50
60
15
30
MAX
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
HANBit Electronics Co.,Ltd.
MAX
84
/RAS to column address delay time
/CAS to /RAS precharge time
Row address set-up time
URL:www.hbe.co.kr
REV.1.0 (August.2002)
HANBit
Row address hold time
Column address set-up time
Column Address to /RAS lead time
Read command set-up time
Read command hold referenced to /CAS
Read command hold referenced to /RAS
Write command hold time
Write command hold referenced to /RAS
Write command pulse width
Write command to /RAS lead time
Write command to /CAS lead time
Data-in set-up time
Data-in hold time
Refresh period
Write command set-up time
/CAS setup time (C-B-R refresh)
/CAS hold time (C-B-R refresh)
/RAS precharge to /CAS hold time
NOTES
t
RAH
t
ASC
t
RAL
t
RCS
t
RCH
t
RRH
t
WCH
t
WCR
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
REF
t
WCS
t
CSR
t
CHR
t
RPC
0
5
10
5
10
0
25
0
0
0
10
50
10
13
8
0
8
64
0
5
10
5
10
0
30
0
0
0
10
55
10
15
10
0
10
HMD32M32M16G
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
64
ns
ns
ns
ns
ns
1.
An initial pause of 200µs is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.
V
IH (min)
and V
IL (max)
are reference levels for measuring timing of input signals. Transition times are measured between
V
IH(min)
and V
IL(max)
and are assumed to be 5ns for all inputs.
3.
Measured with a load equivalent to 2TTL loads and 100pF
4.
Operation within the t
RCD(max)
limit insures that t
RAC(max)
can be met. t
RCD(max)
is specified as a reference point only. If t
RCD
is greater than the specified t
RCD(max)
limit, then access time is controlled exclusively by t
CAC
.
5.
Assumes that t
RCD
≥
t
RCD(max)
6. t
AR
, t
WCR
, t
DHR
are referenced to t
RAD(max)
7.This parameter defines the time at which the output achieves the open circuit condition and is not referenced to V
OH
or V
OL
.
8. t
WCS
, t
RWD
, t
CWD
anf t
AWD
are non restrictive operating parameter.
They are included in the data sheet as electrical characteristic only. If t
WCS
≥
tWCS(min)
the cycle is an early write
cycle and the data out pin will remain high impedance for the duration of the cycle.
9. Either t
RCH
or t
RRH
must be satisfied for a read cycle.
10. These parameters are referenced to the /CAS leading edge in early write cycles and to the /W leading edge in read-
write cycles.
11. Operation within the t
RAD(max)
limit insures that t
RAC(max)
can be met. t
RAD(max)
is specified as a reference
point only. If t
RAD
is greater than the specified t
RAD(max)
limit. then access time is controlled by t
AA
.
AC CHARACTERISTICS
URL:www.hbe.co.kr
REV.1.0 (August.2002)
( 0 C
≤
T
A
≤
70oC , Vcc = 5V±10%)
-
5
-
HANBit Electronics Co.,Ltd.
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