ASM3P2811A/B and ASM3P2812A/B and ASM3P2814A/B
Low Power EMI Reduction IC
Features
FCC approved method of EMI attenuation
Provides up to 15dB EMI reduction
Generates a 1x, 2x and 4x low EMI spread spectrum
clock of the input frequency
o
1x: ASM3P2811A/B
o
2x: ASM3P2812A/B
o
4x: ASM3P2814A/B
Optimized for input frequency range from 10MHz to
40MHz
Internal loop filter minimizes external components
and board space
Selectable spread options:
o
Down Spread and Center Spread
8 frequency deviation selections:
o
±0.625% to -3.5%
Low inherent Cycle-to-Cycle Jitter
3.3V Operating Voltage
CMOS/TTL compatible inputs and outputs.
Pin-out compatible with Cypress CY25811, CY25812
and CY25814
Commercial and Industrial temperature range
Available in 8-pin SOIC and TSSOP Packages
and Center Spread, and percentage deviation range from
±0.625% to -3.5%.
The ASM3P28XX reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of down stream clock and data dependent signals.
The ASM3P28XX allows significant system cost savings
by reducing the number of circuit board layers, ferrite
beads, shielding, and other passive components that are
traditionally required to pass EMI regulations.
The ASM3P28XX modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal‟s bandwidth is called „spread
spectrum clock generation.‟
The ASM3P28XX uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all-digital method.
Applications
The ASM3P28XX is targeted towards EMI management
for memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as PC
peripheral devices, consumer electronics, and embedded
controller systems.
Product Description
The ASM3P28XX devices are versatile spread spectrum
frequency modulators designed specifically for a wide
range of input clock frequencies from 10MHz to 40MHz.
Refer to
Input/Output Frequency Range Selection Table.
The ASM3P28XX can generate an EMI reduced clock
from crystal, ceramic resonator, or system clock. The
ASM3P28XX-A and the ASM3P28XX-B offer various
combinations of spread options and percentage
deviations. Refer to
Frequency Deviation and Spread
Selection Table.
These combinations include Down
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 2
Publication Order Number:
ASM3P2811/D
ASM3P2811A/B and ASM3P2812A/B and ASM3P2814A/B
Block Diagram
D_C SRS FRS
VDD
Modulation
XIN / CLKIN
Crystal
Oscillator
XOUT
Frequency
Divider
Feedback
Divide
r
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Pin Configuration
XIN / CLKIN
1
VSS
2
D_C
3
SRS
4
ASM3P2811A/B
ASM3P2812A/B
ASM3P2814A/B
8
XOUT
VDD
FRS
ModOUT
7
6
5
Pin Description
Pin#
1
2
3
Pin Name
XIN / CLKIN
VSS
D_C
Type
I
P
I
Description
Crystal connection or external Clock input.
Ground to entire chip.
Digital logic input used to select Down (LOW) or Center (HIGH) spread options.
(Refer to
Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
Spread range select. Digital logic input used to select frequency deviation
(Refer to
Frequency Deviation and Spread Selection Table).
This pin has an internal pull-up resistor.
Spread spectrum clock output
Frequency range select. Digital logic input used to select Input frequency range
(Refer to
Input/Output Frequency Range Selection Table).
This pin has an internal pull-up resistor.
Power supply for the entire chip.
Crystal connection. If using an external reference, this pin must be left
unconnected.
4
5
6
7
8
SRS
ModOUT
FRS
VDD
XOUT
I
O
I
P
O
Rev. 2 | Page 2 of 11 | www.onsemi.com
ASM3P2811A/B and ASM3P2812A/B and ASM3P2814A/B
Operating Conditions
Symbol
VDD
T
A
C
L
C
IN
Operating temperature
Load Capacitance
Input Capacitance
Parameter
Min
3.0
-40
Max
3.6
+85
10
7
Unit
V
°C
pF
pF
Voltage on any pin with respect to GND
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
CC
I
DD
VDD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
(Inputs D_C, SRS and FRS are pulled high internally)
Input high current
XOUT Output low current
(V
XOL
@ 0.4V, V
DD
= 3.3V)
XOUT Output high current
(V
XOH
@ 2.5V, V
DD
= 3.3V)
Output low voltage (V
DD
= 3.3V, I
OL
= 5mA)
Output high voltage (V
DD
= 3.3V, I
OH
= -5mA)
Dynamic supply current (Unloaded Output)
Static supply current , Standby mode (CLKIN pulled to
GND)
Operating voltage
Power up time (first locked clock cycle after power up)
Clock out impedance
76
3.0
3.3
2.5
8
18
4.5
3.6
500
Parameter
Min
VSS-0.3
2
Typ
Max
0.8
V
DD
+0.3
-50
50
3
3
0.4
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
µS
Ω
AC Electrical Characteristics
Symbol
f
IN
Parameter
Input frequency for ASM3P2811/12/13/14 A/B
Output frequency for ASM3P2811A/B
Min
10
10
20
40
0.5
0.8
Typ
Max
40
40
80
160
Unit
MHz
MHz
MHz
MHz
nS
nS
pS
f
OUT
Output frequency for ASM3P2812A/B
Output frequency for ASM3P2814A/B
t
LH
t
HL
1
1
Output rise time (measured at 0.8V to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Cycle-to-Cycle Jitter (Unloaded Output)
Output duty cycle
0.9
1.0
±250
1.2
1.3
t
JC
t
D
45
50
55
%
Note: 1. t
LH
and t
HL
are measured into a capacitive load of 10pF.
Rev. 2 | Page 4 of 11 | www.onsemi.com
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
