Socket compatible EPROM pin configurations are shown in the blocks adjacent to the NMC27C64 pins.
Pin Names
A0–A12
CE
OE
O
0
–O
7
PGM
NC
V
PP
V
CC
GND
Addresses
Chip Enable
Output Enable
Outputs
Program
No Connect
Programming
Voltage
Power Supply
Ground
Commercial Temperature Range
V
CC
= 5V 10%
Parameter/Order Number
NMC27C64Q, N 150
NMC27C64Q, N 200
Access Time (ns)
150
200
Extended Temp Range (-40 C to +85 C)
V
CC
= 5V 10%
Parameter/Order Number
NMC27C64QE, NE200
Access Time (ns)
200
2
NMC27C64 Rev. C
www.fairchildsemi.com
NMC27C64 65,536-Bit (8192 x 8) CMOS EPROM
Absolute Maximum Ratings
(Note 1)
Temperature Under Bias
Storage Temperature
All Input Voltages except A9
with Respect to Ground (Note 10)
-55 C to +125 C
-65 C to +150 C
+6.5V to -0.6V
Power Dissipation
Lead Temperature
(Soldering, 10 sec.)
ESD Rating
(Mil Spec 883C,
Method 3015.2)
1.0W
300 C
2000V
All Output Voltages
with Respect to Ground (Note 10)V
CC
+1.0V to GND -0.6V
V
PP
Supply Voltage and A
9
with Respect to Ground
During Programming
V
CC
Supply Voltage with
Respect to Ground
Operating Conditions
(Note 7)
Temperature Range
NMC27C64Q 150, 200
NMC27C64N 150, 200
NMC27C64QE 200
NMC27C64NE 200
V
CC
Power Supply
0 C to +70 C
-40 C to +85 C
+5V 10%
+14.0V to -0.6V
+7.0V to -0.6V
READ OPERATION
DC Electrical Characteristics
Symbol
I
LI
I
LO
I
CC1
(Note 9)
I
CC2
(Note 9)
I
CCSB1
I
CCSB2
I
PP
V
IL
V
IH
V
OL1
V
OH1
V
OL2
V
OH2
Parameter
Input Load Current
Output Leakage Current
V
CC
Current (Active)
TTL Inputs
V
CC
Current (Active)
CMOS Inputs
V
CC
Current (Standby)
TTL Inputs
V
CC
Current (Standby)
CMOS Inputs
VPP Load Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
Conditions
V
IN
= V
CC
or GND
V
OUT
= V
CC
or GND, CE = V
IH
CE = V
IL
,f=5 MHz
Inputs = V
IH
or V
IL
, I/O = 0 mA
CE = GND, f = 5 MHz
Inputs = V
CC
or GND, I/O = 0 mA
CE = V
IH
CE = V
CC
V
PP
= V
CC
Min
Typ
Max
10
10
Units
A
A
mA
mA
mA
A
5
3
0.1
0.5
10
-0.1
2.0
20
10
1
100
A
0.8
V
CC
+1
0.45
V
V
V
V
I
OL
= 2.1 mA
I
OH
= -400 A
I
OL
= 0 A
I
OH
= 0 A
V
CC
- 0.1
2.4
0.1
V
V
AC Electrical Characteristics
NMC27C64
Symbol
t
ACC
t
CE
t
OE
t
DF
t
CF
t
OH
Parameter
Address to
Output Delay
CE to Output Delay
OE to Output Delay
OE High to Output Float
CE High to Output Float
Output Hold from
Addresses, CE or OE ,
Whichever Occurred First
Conditions
Min
CE = OE = V
IL
PGM = V
IH
OE = V
IL
, PGM = V
IH
CE = V
IL
, PGM = V
IH
CE = V
IL
, PGM = V
IH
OE = V
IL
, PGM = V
IH
CE = OE = V
IL
PGM = V
IH
0
0
0
150
Max
150
150
60
60
60
0
0
0
200, E200
Min
Max
200
200
60
60
60
Units
ns
ns
ns
ns
ns
ns
3
NMC27C64 Rev. C
www.fairchildsemi.com
NMC27C64 65,536-Bit (8192 x 8) CMOS EPROM
Capacitance
TA = +25˚C, f = 1 MHz (Note 2) NMC27C64Q
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
6
9
Max
8
12
Units
pF
pF
Capacitance
TA = +25˚C, f = 1 MHz (Note 2) NMC27C64N
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
5
8
Max
10
10
Units
pF
pF
AC Test Conditions
Output Load
1 TTL Gate and C
L
= 100 pF (Note 8)
5 ns
0.45V to 2.4V
0.8V and 2V
0.8V and 2V
Input Rise and Fall Times
Input Pulse Levels
Timing Measurement Reference Level
Inputs
Outputs
AC Waveforms
(Note 6) (Note 9)
ADDRESS
2V
0.8V
Address Valid
CE
2V
0.8V
t
CF
t
CE
t
OE
(Note 3)
(Notes 4, 5)
OE
2V
0.8V
t
DF
(Notes 4, 5)
Valid Output
OUTPUT
2V
0.8V
Hi-Z
t
ACC
(Note 3)
Hi-Z
t
OH
Note 1:
Stresses above those listed under
“Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note 2:
This parameter is only sampled and is not 100% tested.
Note 3:
OE may be delayed up to t
ACC
- t
OE
after the falling edge of CE without impacting t
ACC
.
Note 4:
The t
DF
and t
CF
compare level is determined as follows:
High to TRI-STATE
®
, the measured V
OH1
(DC)
˛
0.10V;
Low to TRI-STATE, the measured V
OL1
(DC) + 0.10V.
Note 5:
TRI-STATE may be attained using OE or CE .
Note 6:
The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1 F ceramic capacitor be used on every device
between V
CC
and GND.
Note 7:
The outputs must be restricted to V
CC
+ 1.0V to avoid latch-up and device damage.
Note 8:
1 TTL Gate: I
OL
= 1.6 mA, I
OH
= -400 A.
C
L
: 100 pF includes fixture capacitance.
Note 9:
V
PP
may be connected to V
CC
except during programming.
Note 10:
Inputs and outputs can undershoot to -2.0V for 20 ns Max.
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