SPP12N50C3
SPI12N50C3,
SPA12N50C3
Cool MOS™ Power Transistor
Feature
•
New revolutionary high voltage technology
•
Ultra low gate charge
•
Periodic avalanche rated
•
Extreme dv/dt rated
•
Ultra low effective capacitances
•
Improved transconductance
P-TO220-3-31
1
2
3
V
DS
@
T
jmax
R
DS(on)
I
D
FP
PG-TO220-3-31
PG-TO262-
560
0.38
11.6
PG-TO220
2
V
Ω
A
1
23
P-TO220-3-1
•
PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute)
Type
Package
Ordering Code
SPP12N50C3
PG-TO220
Q67040-S4579
Marking
12N50C3
12N50C3
12N50C3
SPI12N50C3
PG-TO262
Q67040-S4578
SPA12N50C3
Maximum Ratings
Parameter
PG-TO220FP
SP000216322
Symbol
Value
Unit
SPP_I
SPA
Continuous drain current
T
C
= 25 °C
T
C
= 100 °C
I
D
A
11.6
7
11.6
1)
7
1)
Pulsed drain current,
t
p
limited by
T
jmax
Avalanche energy, single pulse
I
D
=5.5A,
V
DD
=50V
I
D puls
34.8
34.8
A
E
AS
340
340
mJ
Avalanche energy, repetitive
t
AR
limited by
T
jmax
2)
I
D
=11.6A,
V
DD
=50V
E
AR
0.6
11.6
0.6
11.6
A
Avalanche current, repetitive
t
AR
limited by
T
jmax
Gate source voltage
I
AR
V
GS
±20
±
30
±20
±
30
V
Gate source voltage AC (f >1Hz)
Power dissipation,
T
C
= 25°C
V
GS
P
tot
125
33
W
Operating and storage temperature
Reverse diode dv/dt
7)
T
j ,
T
stg
dv/dt
-55...+150
15
°C
V/ns
Rev.
3.1
Page 1
2009-11-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Maximum Ratings
Parameter
Symbol
Value
Unit
Drain Source voltage slope
V
DS
= 400 V,
I
D
= 11.6 A,
T
j
= 125 °C
d
v
/d
t
50
V/ns
Thermal Characteristics
Parameter
Symbol
min.
R
thJC
R
thJC_FP
R
thJA
R
thJA_FP
R
thJA
Values
typ.
max.
Unit
Thermal resistance, junction - case
Thermal resistance, junction - case, FullPAK
Thermal resistance, junction - ambient, leaded
Thermal resistance, junction - ambient, FullPAK
SMD version, device on PCB:
@ min. footprint
@ 6 cm
2
cooling area
3)
Soldering temperature,
wavesoldering
1.6 mm (0.063 in.) from case for 10s
4)
-
-
-
-
-
-
-
-
-
-
-
35
-
1
3.8
62
80
62
-
260
K/W
T
sold
-
°C
Electrical Characteristics,
at
T
j=25°C unless otherwise specified
Symbol
Conditions
Parameter
min.
Drain-source breakdown voltage
V
(BR)DSS
V
GS
=0V,
I
D
=0.25mA
Drain-Source avalanche
V
(BR)DS
V
GS
=0V,
I
D
=11.6A
breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
V
GS(th)
I
DSS
I
D
=500µA,
V
GS=VDS
V
DS
=500V,
V
GS
=0V,
T
j
=25°C
T
j
=150°C
Values
typ.
-
600
3
0.1
-
-
0.34
0.92
1.4
max.
-
-
3.9
Unit
V
500
-
2.1
-
-
-
-
-
-
µA
1
100
100
0.38
-
-
nA
Ω
Gate-source leakage current
I
GSS
V
GS
=20V,
V
DS
=0V
V
GS
=10V,
I
D
=7A
T
j
=25°C
T
j
=150°C
Drain-source on-state resistance
R
DS(on)
Gate input resistance
R
G
f=1MHz,
open drain
Rev.
3.1
Page 2
2009-11-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Electrical Characteristics,
at
T
j
= 25 °C, unless otherwise specified
Parameter
Characteristics
Transconductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Symbol
Conditions
min.
Values
typ.
8
1200
400
30
45
92
10
8
45
8
max.
-
-
-
-
-
-
-
-
-
-
Unit
g
fs
C
iss
C
oss
C
rss
V
DS
≥
2*I
D
*R
DS(on)max
,
I
D
=7A
V
GS
=0V,
V
DS
=25V,
f=1MHz
-
-
-
-
-
-
S
pF
Effective output capacitance,
5)
C
o(er)
energy related
Effective output capacitance,
6)
C
o(tr)
time related
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Q
gs
Q
gd
Q
g
V
GS
=0V,
V
DS
=0V to 400V
t
d(on)
t
r
t
d(off)
t
f
V
DD
=380V,
V
GS
=0/10V,
I
D
=11.6A,
R
G
=6.8
Ω
-
-
-
-
ns
V
DD
=400V,
I
D
=11.6A
-
-
-
-
5
26
49
5
-
-
-
-
nC
V
DD
=400V,
I
D
=11.6A,
V
GS
=0 to 10V
V
(plateau)
V
DD
=400V,
I
D
=11.6A
V
1Limited only by maximum temperature
2Repetitve avalanche causes additional power losses that can be calculated as
P
AV
=E
AR
*f.
3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
4Soldering temperature for TO-263: 220°C, reflow
5
C
o(er)
is a fixed capacitance that gives the same stored energy as
C
oss
while
V
DS
is rising from 0 to 80%
V
DSS
.
6
C
is a fixed capacitance that gives the same charging time as
C
oss
while
V
DS
is rising from 0 to 80%
V
.
o(tr)
DSS
7
I <=I , di/dt<=400A/us, V
SD
D
DClink
=400V, V
peak
<V
BR, DSS
, T
j
<T
j,max
.
Identical low-side and high-side switch.
Rev.
3.1
Page 3
2009-11-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Electrical Characteristics
Parameter
Inverse diode continuous
forward current
Inverse diode direct current,
pulsed
Inverse diode forward voltage
Reverse recovery time
Reverse recovery charge
Peak reverse recovery current
Peak rate of fall of reverse
recovery current
Typical Transient Thermal Characteristics
Symbol
SPP_I
R
th1
R
th2
R
th3
R
th4
R
th5
R
th6
0.015
0.03
0.056
0.197
0.216
0.083
T
j
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
rrm
di
rr
/dt
Conditions
min.
T
C
=25°C
Values
typ.
-
-
1
380
5.5
38
1100
max.
11.6
34.8
1.2
-
-
-
-
-
-
Unit
A
V
GS
=0V,
I
F
=I
S
V
R
=400V,
I
F
=I
S
,
di
F
/dt=100A/µs
-
-
-
-
-
V
ns
µC
A
A/µs
T
j
=25°C
Value
SPA
0.15
0.03
0.056
0.194
0.413
2.522
R
th1
Unit
K/W
Symbol
SPP_I
C
th1
C
th2
C
th3
C
th4
C
th5
C
th6
R
th,n
T
case
Value
SPA
0.0001878
0.0007106
0.000988
0.002791
0.007401
0.412
0.0001878
0.0007106
0.000988
0.002791
0.007285
0.063
Unit
Ws/K
E xternal H eatsink
P
tot
(t)
C
th1
C
th2
C
th,n
T
am b
Rev.
3.1
Page 4
2009-11-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
1 Power dissipation
P
tot
=
f
(
T
C
)
140
SPP12N50C3
2 Power dissipation FullPAK
P
tot
=
f
(
T
C
)
36
W
W
120
110
100
28
P
tot
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100
120
P
tot
°C
24
20
16
12
8
4
0
0
160
20
40
60
80
100
120
°C
160
T
C
T
C
3 Safe operating area
I
D
=
f
(
V
DS
)
parameter :
D
= 0 ,
T
C
=25°C
10
2
4 Safe operating area FullPAK
I
D
=
f
(
V
DS
)
parameter:
D
= 0,
T
C
= 25°C
10
2
A
A
10
1
10
1
I
D
10
0
I
D
10
0
10
-1
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
tp = 1 ms
DC
10
-1
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
tp = 1 ms
tp = 10 ms
DC
10
-2 0
10
10
1
10
2
10
V
V
DS
3
10
-2 0
10
10
1
10
2
10
V
V
DS
3
Rev.
3.1
Page 5
209-11-30
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