products are low capacitance dual bidirectional high-speed protection
components, constructed using MOSFET semiconductor technology, and designed to protect against faults
caused by short circuits, AC power cross, induction and lightning surges.
In addition to overcurrent protection, an added feature is the voltage monitoring on the two lines. If the voltage
on the line drops below Vss then the voltage will trigger the device to switch to the blocking state.
The TBU
®
high-speed protector placed in the system circuit will monitor the current with the MOSFET detec-
tion circuit triggering to provide an effective barrier behind which sensitive electronics will not be exposed to
large voltages or currents during surge events. The TBU
®
device is provided in a surface mount DFN package
and meets industry standard requirements such as RoHS and Pb Free solder reflow profiles.
Line 2 SLIC
Line 2
Vss
TBU Device
®
Agency Approval
UL
File Number: E315805
Description
Industry Standards (in Conjunction with OVP Device)
Solutions available for GR-1089-CORE, ITU-T and a combination of both.
Absolute Maximum Ratings (@ T
A
= 25 °C Unless Otherwise Noted)
Symbol
V
imp
Parameter
Peak impulse voltage withstand with duration less than 10 ms
Part Number
TBU-PL050-xxx-WH
TBU-PL060-xxx-WH
TBU-PL075-xxx-WH
TBU-PL085-xxx-WH
TBU-PL050-xxx-WH
TBU-PL060-xxx-WH
TBU-PL075-xxx-WH
TBU-PL085-xxx-WH
Value
500
600
750
850
300
350
400
425
-55 to +125
-65 to +150
+125
±2
Unit
V
V
rms
T
op
T
stg
T
jmax
ESD
Continuous A.C. RMS voltage
Operating temperature range
Storage temperature range
Maximum Junction Temperature
HBM ESD Protection per IEC 61000-4-2 on line pads
V
°C
°C
°C
kV
Electrical Characteristics (@ T
A
= 25 °C Unless Otherwise Noted)
Symbol
I
trigger
R
device
R
match
t
block
I
Q
I
ss
V
reset
V
to
V
ss
R
th(j-l)
R
th(j-l)
R
th(j-l)
R
th(j-l)
Parameter
Part Number
Current required for the device to go from
TBU-PLxxx-100-WH
operating state to protected state
TBU-PLxxx-200-WH
®
Series resistance of the TBU device
Package resistance matching of the TBU
®
device #1 - TBU
®
device #2
Time taken for the device to go into current limiting
Current through the triggered TBU
®
device with 50 Vdc circuit voltage
Operating current with V
ss
= -50 V
Forward Mode
TBU-PLxxx-100-WH
®
Reverse Mode
Voltage below which the triggered TBU
device will transition to normal operating state
Forward Mode
TBU-PLxxx-200-WH
Reverse Mode
Voltage threshold offset with 60 Hz applied voltage, with V
ss
-50 V (V
ss
- V
lineSLIC
)
Operating voltage range relative to V
dd
One side junction to package pads - FR4 using minimum recommended pad layout
Both sides junction to package pads - FR4 using minimum recommended pad layout
One side junction to package pads - FR4 using heat sink on board (6 cm
2
) (0.5 in.
2
)
Both sides junction to package pads - FR4 using heat sink on board (6 cm
2
) (0.5 in.
2
)
Min.
100
200
40
Typ.
150
300
50
±0.5
0.70
100
15
13
20
17
Max.
200
400
55
±1.0
1
1.50
22
20
25
22
0.2
-20
Unit
mA
Ω
Ω
µs
mA
µA
V
V
V
°C/W
°C/W
°C/W
°C/W
0.25
12
10
15
12
-1.0
-180
110
65
70
40
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
TBU-PL Series - TBU
®
High-Speed Protectors
Functional Block Diagram
Line 1 SLIC
CURRENT
SENSE
Vdd
HIGH
VOLTAGE
SWITCH
Line 1
+
VOLTAGE
COMPARATOR
Vss
Vss
Vdd
Vdd
VOLTAGE
COMPARATOR
Vss
CURRENT
SENSE
Line 2 SLIC
+
HIGH
VOLTAGE
SWITCH
Line 2
Reference Application
The TBU-PL Series are high-speed protectors used in voice/
VoIP SLIC applications.The maximum voltage rating of the TBU
®
device should never be exceeded. Where necessary, an OVP
device should be employed to limit the maximum voltage. A cost-
effective protection solution combines Bourns
®
TBU
®
protection
devices with a pair of Bourns
®
MOVs. For bandwidth sensitive
applications, a Bourns
®
GDT may be substituted for the MOV. If
EN55024 EMC compliance is required, the TBU
®
device
may require capacitors to be fitted between the Tip and Ring
connections and ground.
GND
Vdd
Line 1
SLIC
MOV
TBU
®
Device
Line 2
SLIC
Vss
-VBAT
MOV
Line 2
Line 1
Basic TBU Operation
The TBU
®
device, constructed using MOSFET semiconductor
technology, placed in the system circuit will monitor the
current with the MOSFET detection circuit triggering to provide
an effective barrier behind which sensitive electronics are not
exposed to large voltages or currents during surge events. The
TBU
®
device operates in approximately 1 µs - once line current
exceeds the TBU
®
device’s trigger current I
trigger
. When operat-
ed, the TBU
®
device will limit the current to less than the I
trigger
value within the t
block
duration. If voltage above V
reset
is contin-
uously sustained, the TBU
®
device will subsequently reduce the
current to a quiescent current level within a period of time that is
dependent upon the applied voltage.
When the voltage on the SLIC output is driven below
(V
bat
– V
to
) the TBU-PL series device switches to the
blocking state, regardless of output current in the device.
After the surge, the TBU
®
device resets when the voltage
across the TBU
®
device falls to the V
reset
level. The TBU
®
device will automatically reset on lines which have no DC bias
or have DC bias below V
reset
(such as unpowered signal lines).
If the line has a normal DC bias above V
reset
, the voltage
across the TBU
®
device may not fall below V
reset
after the
surge. In such cases, special care needs to be taken to ensure
that the TBU
®
device will reset, with software monitoring as one
method used to accomplish this. Bourns application
engineers can provide further assistance.
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
TBU-PL Series - TBU
®
High-Speed Protectors
Bourns
®
TBU
®
Device Solutions
Telcordia GR-1089-CORE
Intra-building
Port Type 4
Telcordia GR-1089-CORE
Intra-building
Port Type 4a
Non-GR-1089-CORE Intra-building
Specifications
Industry Standard
Surge & AC Withstand
1500 V, 100 A 2/10 µs
120 V
rms
, 25 A, 900 s
1000 V, 100 A 10/1000 µs
120 V
rms
, 25 A, 900 s
5000 V, 500 A 2/10 µs
230 V
rms
, 25 A, 900 s
1500 V, 100 A 2/10 µs
275 V
rms
, 25 A, 900 s
4000 V, 40
Ω
10/700 µs
230 V
rms
10
Ω
- 1000
Ω,
900 s
600 V
rms
600
Ω,
0.2 s
4000 V, 40
Ω
10/700 µs
230 V rms 10
Ω
-1000
Ω,
900 s
600 V rms 600
Ω,
0.1 s
6000 V, 40
Ω
10/700 µs
240 V
rms
10
Ω
- 1000
Ω,
900 s
600 V
rms
600
Ω,
0.2 s
600 V
rms
600
Ω,
1 s*
1500 V
rms
, 200
Ω,
2 s*
6000 V, 40
Ω
10/700 µs
240 V
rms
10
Ω
- 1000
Ω,
900 s
600 V
rms
600
Ω,
1 s
1500 V
rms
, 200
Ω,
2 s
TBU® Device P/N
TBU-PL050-200-WH
TBU-PL060-200-WH
TBU-PL085-200-WH
TBU-PL085-200-WH
TBU-PL075-200-WH
TBU-PL060-200-WH
Qty.
1
1
1
1
1
1
OVP Device P/N
MOV-07D201K
MOV-10D201K
MOV-10D361K
MOV-10D431K
MOV-10D361K
TISP4400M3BJ
Qty.
2
2
2
2
2
2
ITU-T Basic K.20, K.21, K.45
TBU-PL085-200-WH
1
MOV-10D391K
2
ITU-T Enhanced K.20, K.21, K.45
TBU-PL060-200-WH
1
TISP4500H3BJ
2
Notes:
1) The MOV maximum continuous rms voltage rating should not be exceeded. The exception is where the data sheet highlights withstand
capability such as the 600
V
rms
, 1 A for 0.2 s, for example.
2) If EN55024 EMC compliance is required, the TBU
®
device may require capacitors to be fitted between the Tip and Ring connections and
ground (i.e. in parallel with the MOV device). The capacitance value can be chosen to meet levels as follows:
• 10 nF for EN55024 Level 1
• 20 nF for EN55024 Level 2
• 47 nF for EN55024 Level 3
Selection of capacitor voltage rating depends upon TBU
Depending upon the SLIC type, it is usually possible to remove any EMI capacitors present between the output of the SLIC and ground
when using capacitors C1 and C2 in parallel with the MOVs.
* GDT Special Test Protector with DC breakdown (DCBD) of less than 330 V.
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
TBU-PL Series - TBU
®
High-Speed Protectors
Performance Graphs
Typical V-I Characteristics (TBU-PL085-200-WH)
Typical Trigger Current vs. Temperature
1.8
1.8
1.6
Normalized Trigger Current
Normalized Trigger Current
CURRENT
(50 mA/div)
I
TRIP
V
RESET
1.6
1.4
1.4
1.2
1.2
1.0
1.0
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
-75 -50 -25 0 25 50 75 100 125
0.0
-75 -50 -25 0
Temperature (°C)
125
Junction
25 50 75 100
VOLTAGE
(5 V/div)
Junction Temperature (°C)
Tracking Voltage Characteristics
Vbat range of -25 V to -150 V
Typical Resistance vs. Temperature
2.2
2.0
2.2
1.8
2.0
1.6
1.8
1.4
1.6
1.2
1.4
1.0
1.2
0.8
1.0
0.6
0.8
0.4
0.6
0.2
0.4
0.0
0.2
-75 -50 -25 0 25 50 75 100 125
0.0
-75 -50 -25 0
Temperature (°C)
125
Junction
25 50 75 100
100
90
80
70
60
50
40
-4
-3
-2
-1
0
1
2
3
4
Voltage threshold offset (V)
Power Derating Curve
3.0
2.5
Junction Temperature (°C)
Typical Surge Response
No additional PCB Cu (1 TBU
®
Protector)
0.5 sq. in. additional PCB CU (1 TBU
®
Protector)
No additional PCB Cu (2 TBU
®
Protectors)
0.5 sq. in. additional PCB CU (2 TBU
®
Protectors)
Voltage: 100 V/div
Total Max. Power (W)
2.0
1.5
1.0
0.5
0.0
Time: 250 ns/div
Normalized Resistance
Normalized Resistance
Resistance ( )
Current: 100 mA/div
20
40
60
80
100
120
140
Ambient Temperature (°C)
(TBU-PL050-100-WH with MOV-07D201K
Using 1800 V 1.2/50 ms Surge Pulse)
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
TBU-PL Series - TBU
®
High-Speed Protectors
Product Dimensions
0.70
(.028)
0.825
(.032)
0.40
(.016)
0.825
(.032)
6.50 ± 0.10
(.256 ± .004)
1.335
(.053)
0.30
(.012)
1.15
(.045)
0.73
(.029)
1.35
(.053)
0.85
(.033)
1.20
(.047)
0.85
(.033)
1.20
(.047)
1.35
(.053)
0.85
(.033)
0.725
(.029)
1.275
(.050)
0.30
(.012)
1.275
(.050)
4.00 ± 0.10
(.157 ± .004)
XXXXX
YWWLL
PIN 1 & BACKSIDE CHAMFER
0.80 - 1.00
A=
(.031 - .039)
1.335
(.053)
1.25
(.049)
0.85
(.033)
1.275
(.050)
0.25
C
PIN 1
(.010)
1.30
(.051)
0.75
(.030)
0.75
(.030)
0.70
(.028)
0.75
(.030)
0.40
(.016)
0.85
(.033)
(.028)
0.825
(.032)
0.40
(.016)
0.825
(.032)
0.85
0.70
(.033)
0.90
(.035)
A1 = 0.00 - 0.05 SEATING PLANE
(.000 - .002)
0.725
(.029)
1.275
(.050)
DIMENSIONS:
MM
(INCHES)
6
1.20
(.047)
0.85
(.033)
1.35
(.053)
6.50
(.256)
0.30
Recommended Pad Layout
(.045)
(.033 ± .002)
1.335 (.012)
0.85 ± 0.05
1.15
0.30
(.012)
1.275
(.050)
TBU High-Speed Protectors have a 100 % matte-tin termination
finish. For improved thermal dissipation, the recommended layout
8
4
uses PCB copper areas which extend beyond the
1
exposed solder
0.85
pad. The exposed solder pads should be defined by a solder mask
(.033)
1.275
1.335
which matches the pad layout of the TBU
®
device in size and spac-
1
2
(.050)
1.25
(.053)
PIN 1 & BACKSIDE CHAMFER
0.25
ing. It is recommended that
(.049)
should be the same dimension as
they
C
PIN 1
0.75
(.010)
(.030)
the TBU
®
pads but if smaller solder pads are used, they should be
1.30
0.70
(.051)
centered
- 0.05
the TBU
®
package terminal pads and not more than
0.90
(.028)
0.00
on
0.75
0.75
(.035)
(.000 -
0.10-0.12
.002)
(0.004-0.005 in.) smaller in overall width or length.
mm
0.85
(.030)
(.030)
(.033)
0.40
Solder pad areas should not be larger
(.016)
the TBU
®
pad sizes
than
to ensure adequate clearance is maintained. The recommended
®
0.73
(.029)
0.85
(.033)
1.35
(.053)
1.20
(.047)
0.85
(.033)
(.053)
5
8
stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil
opening size
5
0.025 mm (0.0010 in.) less than the solder pad
7
6
size. Extended copper areas beyond the solder pad significantly
improve the junction to ambient thermal resistance, resulting in
2
3
4
operation at lower junction temperatures with a corresponding
benefit of reliability. All pads should soldered to the PCB, includ-
ing pads marked as NC or NU but no electrical connection should
be made to these pads. For minimum parasitic capacitance, it is
recommended that signal, ground or power signals are not routed
beneath any pad.
6
5
8
Thermal Resistance vs Additional PCB Cu Area
8
7
6
5
120
100
4
1
2
Thermal Resistance (°C/W)
1
2
3
4
Power in One Side of TBU
®
Device
Total Power in Both Sides of TBU
®
Device
80
60
40
Dark grey areas show added PCB copper area for better
thermal resistance.
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in
different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
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