Dual Low Capacitance TVS Array for
Telecom Line-Card Applications
PROTECTION PRODUCTS
Description
The LC05-6 has been specifically designed to protect
sensitive components which are connected to high-
speed telecommunications lines from over voltages
caused by
lightning,
electrostatic discharge
(ESD),
and
electrical fast transients
(EFT).
The device is in a JEDEC SO-16 NB package. It is
designed to provide metallic surge protection for two
tip & ring line pairs. The low capacitance topology
means signal integrity is preserved on high-speed lines.
The high surge capability (2000W, t
p
=8/20µs) makes
the LC05-6 suitable for telecommunications systems
operating in harsh transient environments.
The LC05-6 is designed to meet the lightning surge
requirements of Bellcore GR-1089 (intra-building), ITU
K.20, and IEC 61000-4-5. The features of the LC05-6
are ideal for protecting T1/E1 transceivers in WAN
applications.
LC05-6
Features
Transient protection for high-speed data lines to
Bellcore GR 1089 I
PP
=100A (2/10µs)
ITU K.20 I
PP
=40A (5/310µs)
IEC 61000-4-2 (ESD) >25kV
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 100A (8/20µs)
Protects two tip and ring line pairs
Low capacitance for high-speed interfaces
High surge capability
Low clamping voltage
Solid-state silicon avalanche technology
Mechanical Characteristics
JEDEC SO-16 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
Applications
T1/E1 Line Cards
Base Stations
WAN Equipment
CSU/DSU
Multiplexers
Routers
ISP Equipment
Customer Premise Equipment
Circuit Diagram
Schematic & PIN Configuration
TIP
RING
SO-16 (Top View)
Revision 01/15/03
1
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LC05-06
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Power (t
p
= 8/20µs)
Peak Pulse Current (t
p
= 8/20µs)
Lead Soldering Temp erature
Op erating Temp erature
Storage Temp erature
Symbol
P
p k
I
P P
T
L
T
J
T
STG
Value
2000
100
260 (10 sec.)
-55 to +125
-55 to +150
Units
Watts
A
°C
°C
°C
Electrical Characteristics
LC05-6
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Symbol
V
RWM
V
BR
I
R
I
t
= 1mA
V
RWM
= 6V, T=25°C
V
RWM
= 3V, T=25°C
Clamp ing Voltage
Clamp ing Voltage
Clamp ing Voltage
Junction Cap acitance
V
C
V
C
V
C
C
j
I
PP
= 10A,
t
p
= 10/1000µs
I
PP
= 50A,
t
p
= 8/20µs
I
PP
= 100A,
t
p
= 8/20µs
Each Line
V
R
= 0V, f = 1MHz
6.8
15
2
12.5
15
20
15
Conditions
Minimum
Typical
Maximum
6
Units
V
V
µA
µA
V
V
V
pF
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LC05-06
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
100
Peak Pulse Power - P
pk
(kW)
Power Derating Curve
110
100
% of Rated Power or I
PP
90
80
70
60
50
40
30
20
10
10
1
0.1
0.1
1
10
Pulse Duration - t
p
(µs)
100
1000
0
0
25
50
75
100
o
125
150
Ambient Temperature - T
A
( C)
Pulse Waveform
110
100
90
80
Percent of I
PP
70
60
50
40
30
20
10
0
0
5
10
15
Time (µs)
20
25
30
0
0
td = I
PP
/2
e
-t
W aveform
Parameters:
tr = 8µs
td = 20µs
16
14
Clamping Voltage - V
c
(V)
12
10
8
6
4
2
Clamping Voltage vs. Peak Pulse Current
Waveform
Parameters:
tr = 8µs
td = 20µs
20
40
60
80
100
Peak Pulse Current - I
pp
(A)
Capacitance vs. Reverse Voltage
6
5
Capacitance - C
j
(pF)
4
3
2
1
f = 1MHz
0
0
1
2
3
4
5
6
7
Reverse Voltage - V
R
(V)
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LC05-06
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Two
High-Speed Line Pairs
The LC05-6 is designed to protect four high-speed data
lines (two differential pairs) from transient over-volt-
ages which result from lightning and ESD. Protection
of two line pairs is achieved by connecting the device
as follows: Pins 1-4 are connected to line 1 of the first
pair (i.e. Tip 1) and pins 13-16 are connected to line 2
of the first pair (i.e. Ring 1). Pins 5-8 are connected to
line 1 of the second pair (i.e. Tip 2) and pins 9-12 are
connected to line 2 of the second pair (i.e. Ring 2). All
pins should be connected for best results. Minimize
parasitic inductance in the protection circuit path by
keeping the trace length between the protected line
and the LC05-6 as short as possible.
T1/E1 Linecard Protection
A typical T1/E1 linecard protection circuit is shown in
Figure 2. The LC05-6 is connected between Tip & Ring
on the transmit and receive line pairs. It provides
protection to metallic (line-to-line) lightning and ESD
surges. It is designed to meet the intra-building re-
quirements of Bellcore GR-1089. This design takes
advantage of the isolation of the transformer to
suppress common mode surges. To complete the
protection circuit, the SRDA05-4 (or SRDA3.3-4 for
3.3V supplies) is employed as the IC side protection
element. This device helps prevent the transceiver
from latching up by providing fine clamping of tran-
sients that are coupled through the transformer.
Figure 1 - Connection for Differential (Line-to-Line)
Protection of two Tip/Ring Line Pairs
TIP 1
RING 1
TIP 2
RING 2
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LC05-06
PROTECTION PRODUCTS
Typical Applications
Figure 2 - T1/E1 Line Card Protection
2003 Semtech Corp.
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