Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete
information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no
responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without
notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information
does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of
SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's
standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or
errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon
request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure
could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC
and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms
of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems
Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND
ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY
DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR
REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC
OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO
HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
DAMAGES.
Revision 0.1 (03-29-06)
Page 2
SMSC TMC2074
DATASHEET
Dual Mode CircLink™ Controller
Datasheet
TABLE OF CONTENTS
Chapter 1
1.1
1.2
1.3
1.4
General Description................................................................................................................................6
About CircLink...................................................................................................................................................6
About TMC2074 .................................................................................................................................................7
Pin Description by Functions.........................................................................................................................13
1.5.1
CPU Interface Pins (27) .................................................................................................................................13
External Output or I/O Pins (10).....................................................................................................................14
1.5.5
Test Pins (5) ..................................................................................................................................................15
CPU Type Selection.......................................................................................................................................16
Data Bus Width Selection ..............................................................................................................................20
1.6.6
Data Bus Byte Swap ......................................................................................................................................20
1.6.7
Data Strobe Polarity Specification..................................................................................................................20
Maximum Node (MAXID) Number Setup .......................................................................................................21
1.6.10
Node ID Setup............................................................................................................................................21
Test Pins ....................................................................................................................................................24
Reducing Token Loss ....................................................................................................................................27
2.4.2
Reduction of Network Reconfiguration Time..................................................................................................27
2.4.3
Reduction of Reconfiguration Burst Signal Send Time ..................................................................................28
Packet Data Structure....................................................................................................................................32
2.6
CPU Interface...................................................................................................................................................33
2.6.1
CPU Identification and Compatibility between Intel and Motorola Processors ...............................................33
Communication Mode ....................................................................................................................................36
2.8
Sending in Peripheral Mode ...........................................................................................................................38
2.8.1
Example of Sending Control from CPU in Free Format Mode .......................................................................38
2.8.2
TX Control from CPU in Remote Buffer Mode ...............................................................................................39
2.9
Receive in Peripheral Mode............................................................................................................................39
2.9.1
Temporary Receive and Direct Receive ........................................................................................................40
2.9.2
Example of Receive Flow in Free Format Mode ............................................................................................43
2.9.3
Example of Receive Flow in Remote Buffer Mode.........................................................................................44
2.9.4
Warning Timer (WT) at Remote Buffer Receive ............................................................................................44
Details of Register ...........................................................................................................................................70
- Pin Lists Sorted by Function.....................................................................................................................10
- The Number of Nodes and RAM Page Size.............................................................................................28
- CPU Type ................................................................................................................................................33
- Distinction and Matching of the CPU Type...............................................................................................33
- Page Format of Packet Buffer ..................................................................................................................42
- Transmission Period According to Timer Setup .......................................................................................48