19-1928; Rev 0; 1/01
IT
TION K
VALUA
E
BLE
AVAILA
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
____________________________Features
o
Four Simultaneous-Sampling T/H Amplifiers with
Two Multiplexed Inputs (Eight Single-Ended
Inputs Total)
o
2µs Conversion Time per Channel
o
Throughput: 390ksps (1 Channel)
218ksps (2 Channels)
152ksps (3 Channels)
116ksps (4 Channels)
o
Input Range: ± 5V (MAX115)
± 2.5V (MAX116)
o
Fault-Protected Input Multiplexer (±17V)
o
Internal +2.5V or External Reference Operation
o
Programmable On-Board Sequencer
o
High-Speed Parallel DSP Interface
o
Internal 10MHz Clock
________________General Description
The MAX115/MAX116 are high-speed, multichannel,
12-bit data-acquisition systems (DAS) with simultane-
ous track/holds (T/Hs). These devices contain a 12-bit,
2µs, successive-approximation analog-to-digital con-
verter (ADC), a +2.5V reference, a buffered reference
input, and a bank of four simultaneous-sampling T/H
amplifiers that preserve the relative phase information
of the sampled inputs. The MAX115/MAX116 have two
multiplexed inputs for each T/H, allowing a total of eight
inputs. In addition, the converter is overvoltage tolerant
to ±17V. A fault condition on any channel will not dam-
age the IC. Available input ranges are ±5V (MAX115)
and ±2.5V (MAX116).
The parallel interface’s data access and bus release
timing specifications are compatible with most popular
digital signal processors and 16-bit/32-bit microproces-
sors. The MAX115/MAX116 conversion results can be
accessed without resorting to wait-states.
MAX115/MAX116
________________________Applications
Multiphase Motor Control
Power-Grid Synchronization
Power-Factor Monitoring
Digital Signal Processing
Vibration and Waveform Analysis
PART
MAX115CAX
MAX115EAX
MAX116CAX
MAX116EAX
Ordering Information
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
36 SSOP
36 SSOP
36 SSOP
36 SSOP
Pin Configuration
TOP VIEW
CH2B 1
CH2A 2
CH1B 3
CH1A 4
AV
DD
5
REFIN 6
REFOUT 7
AGND 8
D11 (MSB) 9
D10 10
D9 11
D8 12
D7 13
D6 14
D5 15
D4 16
DV
DD
17
DGND 18
36 AGND
35 CH3B
34 CH3A
33 CH4B
32 CH4A
Typical Operating Circuit
CH1A
CH1B
CH2A
CH2B
CH3A
CH3B
CH4A
CH4B
+5V
0.1µF
0.1µF
-5V
0.1µF
0.1µF
REFOUT
4.7µF
CLK
16MHz
CONTROL INTERFACE
CONVST INT
CS
RD
WR
DGND
AV
SS
REFIN
DV
DD
+5V
AV
DD
AGND
A0
A1
D0/A2
D1/A3
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
MAX115
MAX116
31 AV
SS
30 INT
29 CONVST
28 RD
27 WR
26 CS
25 CLK
24 A0
23 A1
22 D0/A2 (LSB)
21 D1/A3
20 D2
19 D3
MAX115
MAX116
SSOP
________________________________________________________________
Maxim Integrated Products
1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
MAX115/MAX116
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND ...........................................................-0.3V to 6V
AV
SS
to AGND ............................................................0.3V to -6V
DV
DD
to DGND ...........................................................-0.3V to 6V
AGND to DGND .......................................................-0.3V to 0.3V
CH_ _ to AGND....................................................................±17V
REFIN, REFOUT to AGND ..........................................-0.3V to 6V
Digital Inputs/Outputs to DGND ..............-0.3V to (DV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
36-Pin SSOP (derate 11.8mW/°C above +70°C) ..........941mW
Operating Temperature Ranges
MAX115_CAX/MAX116_CAX ...............................0°C to +70°C
MAX115_EAX/MAX116_EAX ............................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s)....................................300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= +2.5V (external reference), AGND = DGND = 0, 4.7µF capacitor
from REFOUT to AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DC ACCURACY
(Note 1)
Resolution
Integral Nonlinearity (Note 2)
Differential Nonlinearity
N
INL
DNL
MAX115
Bipolar Zero Error
MAX116
Bipolar Zero-Error Match
Zero-Code Tempco
Between all channels
MAX115
MAX116
MAX115
Gain Error
MAX116
Gain Error Match
Gain Error Tempco
MAX115
MAX116
SNR
THD
SFDR
(Note 4)
(Notes 4, 5)
(Note 4)
(Note 6)
80
80
69
-80
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
2
120
60
±5
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
2
180
90
±5
±15
±25
±10
±18
5
mV
µV/°C
mV
±5
All channels
12
0.6
0.6
±5
±1
±1
±15
±30
±10
±18
5
mV
µV/°C
mV
Bits
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE
(f
CLK
= 16MHz, f
IN
= 10.06kHz) (Notes 1, 3)
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
dB
dB
dB
dB
2
_______________________________________________________________________________________
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
MAX115/MAX116
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= +2.5V (external reference), AGND = DGND = 0, 4.7µF capacitor
from REFOUT to AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
ANALOG INPUT
Input Voltage Range
Input Current
Input Capacitance
TRACK/HOLD
Acquisition Time
Small-Signal Bandwidth
Full-Power Bandwidth
Drop Rate
Aperture Delay
Aperture Jitter
Aperture-Delay Matching
REFERENCE OUTPUT
(Note 7)
Output Voltage
External Load Regulation
REFOUT Tempco
External Capacitive Bypass
at REFIN
External Capacitive Bypass
at REFOUT
REFERENCE INPUT
Input Voltage Range
Input Current
Input Resistance (Note 9)
Input Capacitance
EXTERNAL CLOCK
External Clock Frequency
INTERNAL CLOCK
Internal Clock Frequency
DIGITAL INPUTS
(CONVST,
RD, WR, CS,
CLK, A0–A3) (Note 1)
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
V
IH
V
IL
I
IN
C
IN
CONVST, RD, WR, CS,
CLK
A0–A3
15
2.4
0.8
±1
±10
V
V
µA
pF
5.6
10
14.8
MHz
16
MHz
10
10
2.40
2.50
2.60
±50
V
µA
kΩ
pF
V
REFOUT
T
A
= +25°C
0 < I
REF
< 1mA
(Note 8)
0.1
4.7
22
2.462
2.5
0.5
30
2.532
V
mV/mA
ppm/°C
µF
µF
t
ACQ
600
10
1.3
2
10
30
500
ns
MHz
MHz
mV/ms
ns
ps
ps
V
IN
I
IN
C
IN
MAX115
MAX116
MAX115 (-5V to +5V range)
MAX116 (-2.5V to +2.5V range)
16
±5
±2.5
±625
±15
V
µA
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
_______________________________________________________________________________________
3
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
MAX115/MAX116
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= +2.5V (external reference), AGND = DGND = 0, 4.7µF capacitor
from REFOUT to AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Output High Voltage
Output Low Voltage
Three-State Leakage Current
Three-State Output
Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
Negative Supply Voltage
Digital Supply Voltage
Positive Supply Current
Negative Supply Current
Digital Supply Current
Shutdown Positive Current
Shutdown Negative Current
Shutdown Digital Current
Positive Supply Rejection
Negative Supply Rejection
Power Dissipation
PSRR+
PSRR-
(Note 10)
(Note 10)
(Note 11)
175
AV
DD
AV
SS
DV
DD
I
AVDD
I
AVSS
-20
4.75
-5.25
4.75
5
-5
5
17
-15
3
1
-1
13
±1
±1
6
5.25
-4.75
5.25
25
V
V
V
mA
mA
mA
µA
µA
µA
LSB
LSB
mW
SYMBOL
V
OH
V
OL
I
OUT
= 1mA
I
OUT
= -1.6mA
D0–D11
10
CONDITIONS
MIN
4
0.4
±10
TYP
MAX
UNITS
V
V
µA
pF
DIGITAL OUTPUTS
(D0–D11,
INT)
TIMING CHARACTERISTICS
(See Figure 4, AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, AGND = DGND = 0, T
A
= T
MIN
to T
MAX
, Typical values are at T
A
= +25°C,
unless otherwise noted.)
PARAMETER
CONVST
Pulse Width
CS
to
WR
Setup Time
CS
to
WR
Hold Time
WR
Low Pulse Width
Address Setup Time
Address Hold Time
RD
to
INT
Delay
Delay Time Between Reads
CS
to
RD
Setup Time
CS
to
RD
Hold Time
RD
Low Pulse Width
Data-Access Time
Bus-Relinquish Time
SYMBOL
t
CW
t
CWS
t
CWH
t
WR
t
AS
t
AH
t
ID
t
RD
t
CRS
t
CRH
t
RD
t
DA
t
DH
25pF load (Note 12)
25pF load (Note 13)
5
Guaranteed by design
Guaranteed by design
25pF load
45
0
0
30
40
45
Guaranteed by design
Guaranteed by design
CONDITIONS
MIN
30
0
0
30
30
0
55
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
_______________________________________________________________________________________
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
MAX115/MAX116
TIMING CHARACTERISTICS (continued)
(See Figure 4, AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, AGND = DGND = 0, T
A
= T
MIN
to T
MAX
, Typical values are at T
A
= +25°C,
unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
Mode 1,
C
hannel 1
Conversion Time
t
CONV
Mode 2,
C
hannel 2
Mode 3,
C
hannel 3
Mode 4,
C
hannel 4
Mode 1,
C
hannel 1
Conversion Rate
Mode 2,
C
hannel 2
Mode 3,
C
hannel 3
Mode 4,
C
hannel 4
Startup Time
Exiting shutdown
20
MIN
TYP
MAX
2
4
6
8
390
218
152
116
ms
ksps
µs
UNITS
Note 1:
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
REFIN
= 2.500V (external), V
IN
= ±5V (MAX115) or ±2.5V (MAX116).
Note 2:
Integral nonlinearity is the analog value’s deviation at any code from its theoretical value after the full-scale range and
offset have been calibrated.
Note 3:
CLK synchronized with
CONVST.
Note 4:
f
IN
= 10.06kHz, V
IN
= ±5V (MAX115) or ±2.5V (MAX116).
Note 5:
First five harmonics.
Note 6:
All inputs except CH1A driven with ±5V (MAX115) or ±2.5V (MAX116) 10.06kHz signal, CH1A connected to AGND and digi-
tized.
Note 7:
AV
DD
= DV
DD
= +5V, AV
SS
= -5V, V
IN
= 0V (all channels).
Note 8:
Temperature drift is defined as the change in output voltage from +25°C to T
MIN
or T
MAX
. It is calculated as
TC = [∆REFOUT/REFOUT] /
∆T.
Note 9:
See Figure 2.
Note 10:
Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage. Tested with one input
at full scale and all others at AGND. V
REFIN
= +2.5V (internal).
Note 11:
Tested with all inputs connected to AGND. V
REFIN
= +2.5V (internal).
Note 12:
The data access time is defined as the time required for an output to cross +0.8V or +2.0V. It is measured using the circuit
of Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load.
Note 13:
The bus relinquish time is derived from the measured time taken for the data outputs to change +0.5V when loaded with the
circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging and discharging the
120pF capacitor. The time given is the part’s true bus relinquish time, which is independent of the external bus loading capac-
itance.
_______________________________________________________________________________________
5
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