19-4145; Rev 6; 11/11
Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
General Description
The MAX16016/MAX16020/MAX16021 supervisory cir-
cuits monitor power supplies, provide battery-backup
control, and chip-enable (CE) gating to write protect
memory in microprocessor (µP)-based systems. These
low-power devices improve system reliability by providing
several supervisory functions in a small, single integrated
solution.
The MAX16016/MAX16020/MAX16021 perform four
basic system functions:
1) Provide a µP reset output during V
CC
supply power-
up, power-down, and brownout conditions.
2) Control V
CC
to battery-backup switching internally
to maintain data or low-power operation for memo-
ries, real-time clocks (RTCs), and other digital logic
when the main power is removed.
3) Provide memory write protection through internal
chip-enable gating during brownout.
4) Provide a combination of additional supervisory
functions listed in the
Features
section.
The MAX16016/MAX16020/MAX16021 operate from a
1.53V to 5.5V supply voltage and offer fixed reset
thresholds for monitoring 5V, 3.3V, 3V, 2.5V, and 1.8V
systems. Each device is available with either a push-
pull or open-drain reset output.
The MAX16016/MAX16020/MAX16021 are available in
small TDFN/TQFN packages and are fully specified for
an operating temperature range of -40°C to +85°C.
Features
o
System Monitoring for 5V, 3.3V, 3V, 2.5V, or 1.8V
Power-Supply Voltages
o
1.53V to 5.5V Operating Voltage Range
o
Low 1.2µA Supply Current (0.25µA in Battery-
Backup Mode)
o
145ms (min) Reset Timeout Period
o
Battery Freshness Seal
o
On-Board Gating of CE Signals, 1.5ns
Propagation Delay (MAX16020/MAX16021)
o
Debounced Manual Reset Input
o
Watchdog Timer, 1.2s (typ) Timeout
o
Power-Fail Comparator and Low-Line Indicator for
Monitoring Voltages Down to 0.6V
o
Battery-On, Battery-OK, and Battery Test
Indicators
o
Small 10-Pin TDFN or 16-Pin TQFN Packages
o
UL
®
-Certified to Conform to IEC 60950-1
MAX16016/MAX16020/MAX16021
Ordering Information
PART
MAX16016_TB_+T
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
10 TDFN-EP*
The first placeholder “_” designates all output options. Letter
“L” indicates push-pull outputs and letter “P” indicates open-
drain outputs. The last placeholder “_” designates the reset
threshold (see Table 1).
T = Tape and reel.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Ordering Information continued at end of data sheet.
Selector Guide located at end of data sheet.
Applications
Main/Backup Power for RTCs, CMOS Memories
Industrial Control
GPS Systems
Set-Top Boxes
Point-of-Sale Equipment
Portable/Battery Equipment
Pin Configurations
CEOUT
14
TOP VIEW
CEIN
V
CC
16
BATT
MR
PFI
WDI
1
2
15
13
12
11
RESET
GND
PFO
WDO
+
MAX16020
3
4
5
LL
6
BATT_TEST
7
BATTOK
EP
8
BATTON
10
9
TQFN
UL is a registered trademark of Underwriters Laboratories, Inc.
Pin Configurations continued at end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
OUT
Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
MAX16016/MAX16020/MAX16021
ABSOLUTE MAXIMUM RATINGS
V
CC
, BATT, OUT, BATT_TEST to GND.....................-0.3V to +6V
RESET,
RESET,
PFO,
BATTOK,
WDO,
BATTON,
BATT_TEST,
LL,
(all open-drain) to GND .................-0.3V to +6V
RESET,
RESET, BATTOK,
WDO,
BATTON,
LL
(all push-pull) to GND......................-0.3V to (V
OUT
+ 0.3V)
WDI, PFI to GND.......................................-0.3V to (V
OUT
+ 0.3V)
CEIN, CEOUT
to GND ..............................-0.3V to (V
OUT
+ 0.3V)
MR
to GND .................................................-0.3V to (V
CC
+ 0.3V)
Input Current
V
CC
Peak Current.................................................................1A
V
CC
Continuous Current ...............................................250mA
BATT Peak Current .......................................................500mA
BATT Continuous Current ...............................................70mA
Output Current
OUT Short Circuit to GND Duration ....................................10s
RESET,
RESET, BATTON ....................................................20mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin TDFN (derate 24.4mW/°C above +70°C) .......1951mW
16-Pin TQFN (derate 25mW/°C above +70°C) ..........2000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
TDFN ............................................................................+260°C
TQFN............................................................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TDFN
Junction-to Ambient Thermal Resistance (θ
JA
) ...........41°C/W
Junction-to Case Thermal Resistance (θ
JC
) ..................9°C/W
TQFN
Junction-to Ambient Thermal Resistance (θ
JA
) ...........40°C/W
Junction-to Case Thermal Resistance (θ
JC
) ..................6°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
CC
= 1.53V to 5.5V, V
BATT
= 3V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Operating Voltage Range (Note 3)
SYMBOL
CONDITIONS
V
CC
= 1.62V
Supply Current
I
CC
V
CC
> V
TH
V
CC
= 2.8V
V
CC
= 3.6V
V
CC
= 5.5V
Supply Current in
Battery-Backup Mode
V
CC
Switchover Threshold Voltage
BATT Switchover Threshold
Voltage
BATT Standby Current
BATT Freshness Leakage Current
I
BATT
V
CC
= 0V
V
CC
rising, V
CC
- V
BATT
V
CC
falling, V
CC
< V
TH
, V
CC
- V
BATT
V
CC
> V
BATT
+ 0.2V
V
BATT
= 5.5V
V
CC
= 4.75V, I
OUT
= 150mA
V
CC
to OUT On-Resistance
R
ON
V
CC
= 3.15V, I
OUT
= 65mA
V
CC
= 2.35V, I
OUT
= 25mA
V
CC
= 1.91V, I
OUT
= 10mA
Output Voltage in
Battery-Backup Mode
V
OUT
V
BATT
= 4.5V, I
OUT
= 20mA
V
BATT
= 2.5V, I
OUT
= 20mA
V
BATT
- 0.1
V
BATT
- 0.15
1.4
1.7
2.1
2.6
-10
MIN
0
1.2
1.9
2.3
3.4
0.25
0.1
x V
CC
0
+10
20
4.5
4.5
5.0
5.5
V
Ω
TYP
MAX
5.5
2
3
3.5
5
0.5
µA
V
mV
nA
nA
µA
UNITS
V
V
CC,
V
BATT
V
CC
or V
BATT
> V
TH
2
_______________________________________________________________________________________
Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 1.53V to 5.5V, V
BATT
= 3V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Reset Threshold
V
CC
Falling to Reset Delay
Reset Timeout Period
RESET
Output Low Voltage
RESET
Output High Voltage
(Push-Pull Output)
RESET
Output Leakage Current
(Open-Drain Output)
SYMBOL
V
TH
t
RD
t
RP
V
CC
≥
3.3V, I
SINK
= 3.2mA,
RESET
asserted
V
OL
V
CC
≥
1.6V, I
SINK
= 1mA,
RESET
asserted
V
CC
≥
1.2V, I
SINK
= 100µA,
RESET
asserted
V
OH
V
CC
= 1.1 x V
TH
, I
SOURCE
= 100µA,
RESET
deasserted
V
RESET
= 5.5V,
RESET
deasserted
V
CC
≥
3.3V, I
SINK
= 3.2mA, RESET
deasserted
RESET Output Low Voltage
V
OL
V
CC
≥
1.8V, I
SINK
= 1.0mA, RESET
deasserted
V
CC
= 0.9 x V
TH
, I
SOURCE
= 100µA,
RESET asserted
V
RESET
= 5.5V, RESET asserted
V
OUT
- 0.3
1
V
OUT
- 0.3
1
0.3
V
0.3
V
µA
V
CC
falling at 10V/ms
145
CONDITIONS
MIN
TYP
(see Table 1)
20
215
285
0.3
0.3
0.3
V
µA
V
MAX
UNITS
V
µs
ms
RESET OUTPUT (RESET,
RESET)
MAX16016/MAX16020/MAX16021
RESET Output High Voltage
(Push-Pull Output)
RESET Output Leakage Current
(Open-Drain Output)
POWER-FAIL COMPARATOR
PFI, Input Threshold
PFI, Hysteresis
PFI Input Current
PFO
Output Low Voltage
PFO Output Voltage
High (Push-Pull Output)
PFO,
Leakage Current
(Open-Drain Output)
PFO,
Delay Time
MANUAL RESET (MR)
Input Low Voltage
Input High Voltage
Pullup Resistance
Glitch Immunity
MR
to Reset Delay
V
OH
V
PFT
V
PFT-HYS
V
IN
falling, 1.6V
≤
V
CC
≤
5.5V
V
CC
= 5.5V
V
CC
≥
1.6V, I
SINK
= 1mA, output asserted
0.572
-1
0.590
30
0.611
+1
0.3
0.3
V
mV
µA
V
V
OL
V
CC
≥
1.2V, I
SINK
= 100µA, output asserted
V
CC
= 1.1 x V
TH
, I
SOURCE
= 100µA, output
asserted
V
PFO
= 5.5V, output deasserted
V
PFT
+ 100mV to V
PFT
- 100mV
20
V
OUT
- 0.3
V
OH
V
1
µA
µs
V
IL
V
IH
V
CC
= 3.3V
0.7 x V
CC
20
30
100
120
0.3 x V
CC
V
V
kΩ
ns
ns
_______________________________________________________________________________________
3
Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
MAX16016/MAX16020/MAX16021
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 1.53V to 5.5V, V
BATT
= 3V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
WATCHDOG TIMER (WDI,
WDO)
Watchdog Timeout Period
Minimum WDI Input Pulse Width
WDI Input Low Voltage
WDI Input High Voltage
WDI Input Current (Note 7)
WDO
Output Low Voltage
WDO
Output High Voltage
(Push-Pull Output)
WDO
Leakage Current
(Open-Drain Output)
BATTERY-ON INDICATOR (BATTON)
Output Low Voltage
BATTON Leakage Current
BATTON Output High Voltage
Output Short-Circuit Current
(Note 4)
CE GATING (CEIN,
CEOUT)
CEIN
Leakage Current
CEIN
to
CEOUT
Resistance
CEOUT
Short-Circuit Current
CEIN
to
CEOUT
Propagation
Delay
Reset asserted, V
CC
= 0.9 x V
TH
or 0V
Reset not asserted (Note 5)
Reset asserted,
CEOUT
= 0,
V
CC
= 0.9 x V
TH
50Ω source, C
LOAD
= 50pF, V
CC
= 4.75V
V
CC
= 5V, V
CC
≥
V
BATT
, I
SOURCE
= 100µA
Output High Voltage
V
CC
= 0V, V
BATT
≥
2.2V, I
SOURCE
= 1µA
Reset to
CEOUT
Delay
0.8 x
V
CC
V
BATT
-
0.1
12
µs
-1
8
0.75
1.5
+1
50
2
7
µA
Ω
mA
ns
V
OH
V
OL
I
SINK
= 3.2mA, V
BATT
= 2.1V
V
BATTON
= 5.5V
V
CC
= 0.9 x V
TH
, I
SOURCE
= 100µA,
BATTON asserted
Sink current, V
CC
= 5V
V
OUT
- 0.3
60
0.3
1
V
µA
V
mA
V
OL
V
OH
t
WD
t
WDI
V
IL
V
IH
(Note 6)
(Note 6)
V
WDI
= 0V or 5.5V, time average
V
CC
= 5.0V, I
SINK
= 1mA,
WDO
asserted
V
CC
= 1.1 x V
TH
, I
SOURCE
= 100µA,
WDO
deasserted
V
WDO
= 5.5V,
WDO
deasserted
V
OUT
- 0.3
1
0.7 x
V
CC
-1
+1
0.3
0.83
320
0.3 x
V
CC
1.235
1.64
s
ns
V
V
µA
V
V
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
4
_______________________________________________________________________________________
Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 1.53V to 5.5V, V
BATT
= 3V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
LOW LINE (LL)
Low Line to Reset Threshold
Voltage
V
CC
Falling to
LL
Delay
LL
Output Low Voltage
LL
Output High Voltage (Push-
Pull Output)
Output Leakage Current
BATTOK Threshold
BATTOK Output Voltage Low
BATTOK Output High Voltage
BATTOK Output Leakage
Current
BATT_TEST Output Low Voltage
V
OL
V
OH
V
OL
V
OH
V
CC
falling
V
CC
falling at 10V/ms
V
CC
≥
1.6V, I
SINK
= 1mA,
LL
asserted
V
CC
≥
1.2V, I
SINK
= 100µA,
LL
asserted
V
CC
= 0.9 x V
TH_LL
, I
SOURCE
= 100µA,
LL
deasserted
V
LL
= 5.5V,
LL
deasserted
Inferred internally from BATT
V
CC
= 1.1 x V
TH
, I
SINK
= 1mA, reset
asserted
V
CC
= 1.1 x V
TH
, I
SOURCE
= 100µA,
BATTOK asserted
V
BATTOK
= 5.5V, deasserted
V
CC
= 1.1 x V
TH
, I
SINK
= 1mA
V
OUT
-
0.3
1
0.3
2.508
2.6
V
OUT
-
0.3
1
2.673
0.3
(see Table 2)
20
0.3
0.3
mV
µs
V
V
µA
V
V
V
µA
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX16016/MAX16020/MAX16021
BATTERY-OK INDICATOR (BATTOK, BATT_TEST)
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
All devices are 100% production tested at T
A
= +25°C and T
A
= +85°C. Limits to -40°C are guaranteed by design.
V
BATT
can be 0V anytime, or V
CC
can go down to 0V if V
BATT
is active (except at startup).
Use external current-limit resistor to limit current to 20mA (max).
CEIN/CEOUT
resistance is tested with V
CC
= 5V and V
CEIN
= 0V or 5V.
WDI is internally serviced within the watchdog period if WDI is left unconnected.
The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is
designed for a three-stated output device with a 10µA maximum leakage current and capable of driving a maximum capaci-
tive load of 200pF. The three-state device must be able to source and sink at least 200µA when active.
Table 1a. Reset Threshold Ranges
(MAX16016)
SUFFIX
L
M
T
S
R
Z
Y
W
V
RESET THRESHOLD RANGES (V)
MIN
4.508
4.264
2.991
2.845
2.549
2.243
2.117
1.603
1.514
TYP
4.63
4.38
3.08
2.93
2.63
2.32
2.19
1.67
1.575
MAX
4.906
4.635
3.239
3.080
2.755
2.425
2.288
1.733
1.639
Table 1b. Reset Threshold Ranges
(MAX16020/MAX16021)
SUFFIX
L
M
T
S
R
Z
Y
W
V
RESET THRESHOLD RANGES (V)
MIN
4.520
4.275
3.010
2.862
2.568
2.260
2.133
1.616
1.528
TYP
4.684
4.428
3.100
2.946
2.640
2.323
2.192
1.661
1.571
MAX
4.852
4.585
3.190
3.034
2.716
2.390
2.255
1.710
1.618
_______________________________________________________________________________________
5
编程基础
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
