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74AUP1G32GW-DG125

产品描述Logic Gates 1.8V SINGLE 2-INPUT
产品类别半导体    逻辑   
文件大小941KB,共21页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
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74AUP1G32GW-DG125概述

Logic Gates 1.8V SINGLE 2-INPUT

74AUP1G32GW-DG125规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
NXP(恩智浦)
产品种类
Product Category
Logic Gates
RoHSDetails
Logic FamilyAUP
Number of Input Lines2 Input
Number of Output Lines1 Output
High Level Output Current- 4 mA
Low Level Output Current4 mA
传播延迟时间
Propagation Delay Time
6.4 ns
电源电压-最大
Supply Voltage - Max
3.6 V
电源电压-最小
Supply Voltage - Min
800 mV
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
TSSOP
系列
Packaging
Cut Tape
系列
Packaging
MouseReel
系列
Packaging
Reel
FunctionOR
高度
Height
1 mm (Max)
长度
Length
2.25 mm (Max)
宽度
Width
1.35 mm (Max)
Logic TypeCMOS
工作电源电压
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
工厂包装数量
Factory Pack Quantity
3000

文档预览

下载PDF文档
74AUP1G32
Low-power 2-input OR-gate
Rev. 7 — 8 July 2013
Product data sheet
1. General description
The 74AUP1G32 provides the single 2-input OR function.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

74AUP1G32GW-DG125相似产品对比

74AUP1G32GW-DG125 74AUP1G32GN132 74AUP1G32GX125 74AUP1G32GF132 74AUP1G32GM-G
描述 Logic Gates 1.8V SINGLE 2-INPUT Logic Gates OR 4.6 V 20 mA Logic Gates 74AUP1G32GX/X2SON5/REEL 7" Q3/ Logic Gates 1.8V SINGLE LOW-POW Logic Gates SINGLE 2-IN OR GATE 1.8V PICOGATE
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value
制造商
Manufacturer
NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
产品种类
Product Category
Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates
RoHS Details Details Details Details Details
工厂包装数量
Factory Pack Quantity
3000 5000 10000 5000 5000
Logic Family AUP - - AUP AUP
Number of Input Lines 2 Input - - 2 Input 2 Input
Number of Output Lines 1 Output - - 1 Output 1 Output
High Level Output Current - 4 mA - - - 4 mA - 4 mA
Low Level Output Current 4 mA - - 4 mA 4 mA
传播延迟时间
Propagation Delay Time
6.4 ns 16.8 ns - 19.1 ns 34.1 ns
电源电压-最大
Supply Voltage - Max
3.6 V 4.6 V - 3.6 V 3.6 V
电源电压-最小
Supply Voltage - Min
800 mV - 0.5 V - 0.8 V 0.8 V
最小工作温度
Minimum Operating Temperature
- 40 C - - - 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C + 125 C - + 125 C + 125 C
安装风格
Mounting Style
SMD/SMT SMD/SMT - SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
TSSOP XSON-6 - XSON XSON-6
系列
Packaging
Reel Reel Reel Reel Reel
Function OR - - OR Provides single 2-input OR function.
高度
Height
1 mm (Max) - - 0.46 mm 0.46 mm
长度
Length
2.25 mm (Max) - - 1 mm 1.45 mm
宽度
Width
1.35 mm (Max) - - 1 mm 1 mm
工作电源电压
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V - - 1.8 V, 2.5 V, 3.3 V 0.8 V to 3.6 V
Number of Gates - 2 Gate - 1 Gate 1 Gate

 
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