Latch-Up Current.................................................... >200 mA
Operating Range
Range
Commercial
Ambient
Temperature
0
°
C to +70
°
C
V
CC
3.3V
±300
mV
Electrical Characteristics
Over the Operating Range
[1]
WCFS0808V1E 12ns
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Output Leakage
Current
Output Short
Circuit Current
[2]
V
CC
Operating
Supply Current
Automatic CE Power-Down
Current — TTL Inputs
Automatic CE Power-Down
Current — CMOS Inputs
[3]
GND
≤
V
I
≤
V
CC
,
Output Disabled
V
CC
= Max., V
OUT
= GND
V
CC
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
Max. V
CC
, CE
≥
V
IH
,
V
IN
≥
V
IH
, or V
IN
≤
V
IL
,f = f
MAX
Max. V
CC
, CE
≥
V
CC
– 0.3V, V
IN
≥
V
CC
–
0.3V, or V
IN
≤
0.3V,
WE
≥V
CC
– 0.3V or WE
≤0.3V,
f = f
MAX
Test Conditions
V
CC
= Min., I
OH
= –2.0 mA
V
CC
= Min., I
OL
= 4.0 mA
2.2
–0.3
–1
–5
Min.
2.4
0.4
V
CC
+0.3V
0.8
+1
+5
–300
55
5
500
Max.
Unit
V
V
V
V
µA
µA
mA
mA
mA
µA
Notes:
1. Minimum voltage is equal to – 2.0V for pulse durations of less than 20 ns.
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
3. Device draws low standby current regardless of switching on the addresses.
Document #: 38-05225 Rev. **
Page 2 of 10
WCFS0808V1E
Electrical Characteristics
Over the Operating Range (continued)
WCFS0808V1E 15ns
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Output Leakage Current
Output Short Circuit
Current
[2]
V
CC
Operating
Supply Current
Automatic CE Power-Down
Current — TTL Inputs
Automatic CE Power-Down
Current — CMOS Inputs
[3]
GND
≤
V
I
≤
V
CC
,
Output Disabled
V
CC
= Max., V
OUT
= GND
V
CC
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
Max. V
CC
, CE
≥
V
IH
,
V
IN
≥
V
IH
, or V
IN
≤
V
IL
,
f = f
MAX
Max. V
CC
, CE
≥
V
CC
–0.3V, V
IN
≥
V
CC
–
0.3V, or V
IN
≤
0.3V, WE≥V
CC
–0.3V or WE≤
0.3V, f=f
MAX
Test Conditions
V
CC
= Min., I
OH
= –2.0 mA
V
CC
= Min., I
OL
= 4.0 mA
2.2
–0.3
–1
–5
Min.
2.4
0.4
V
CC
+0.3V
0.8
+1
+5
–300
50
5
Max.
Unit
V
V
V
V
µA
µA
mA
mA
mA
I
SB2
500
µA
Capacitance
[4]
Parameter
C
IN
: Addresses
C
IN
: Controls
C
OUT
Output Capacitance
Description
Input Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz, V
CC
= 3.3V
Max.
5
6
6
Unit
pF
pF
pF
AC Test Loads and Waveforms
3.3V
OUTPUT
C
L
INCLUDING
JIG AND
SCOPE
Equivalent to:
THÉVENIN EQUIVALENT
167Ω
OUTPUT
1.73V
R2
351Ω
R1 317Ω
ALL INPUT PULSES
3.0V
GND
10%
90%
90%
10%
≤
3 ns
≤
3 ns
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05225 Rev. **
Page 3 of 10
WCFS0808V1E
Switching Characteristics
Over the Operating Range
[5]
WCFS0808V1E 12ns
Parameter
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
WRITE CYCLE
[8, 9]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE LOW to High Z
[8]
WE HIGH to Low Z
[6]
3
12
8
8
0
0
8
7
0
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
[6]
OE HIGH to High Z
[6, 7]
CE LOW to Low Z
[6]
CE HIGH to High Z
[6, 7]
CE LOW to Power-Up
CE HIGH to Power-Down
0
12
3
6
0
5
3
12
5
12
12
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
Min.
Max.
Unit
Notes:
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the
specified I
OL
/I
OH
and capacitance C
L
= 30 pF.
6. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
LZWE
for any given device.
7. t
HZOE
, t
HZCE
, t
HZWE
are specified with C
L
= 5 pF as in AC Test Loads. Transition is measured ±500 mV from steady state voltage.
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
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