IDT74FCT521AT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 8-BIT
IDENTITY COMPARATOR
IDT74FCT521AT/CT
FEATURES:
•
•
•
•
•
•
•
•
A and C grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
DESCRIPTION:
The IDT74FCT521T is an 8-bit identity comparator built using an
advanced dual metal CMOS technology. These devices compare two
words of up to eight bits each and provide a low output when the two words
match bit for bit. The expansion input
I
A
=
B
also serves as an active low
enable input.
FUNCTIONAL BLOCK DIAGRAM
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
2
3
4
5
6
7
8
9
19
A
4
11
B
4
12
A
5
B
5
A
6
B
6
A
7
B
7
I
A=B
13
14
15
16
17
18
1
O
A=B
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
NOVEMBER 2016
DSC-2572/14
© 2016 Integrated Device Technology, Inc.
IDT74FCT521AT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
I
A=B
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
TOP VIEW
V
CC
O
A=B
B
7
A
7
B
6
A
6
B
5
A
5
B
4
A
4
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
Package Type
QSOP
SOIC
Package Code
PCG20
PSG20
Order Code
QG
SOG
PIN DESCRIPTION
Pin Names
A
0
- A
7
B
0
- B
7
I
A
=
B
O
A
=
B
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
Description
FUNCTION TABLE
(1)
Inputs
I
A = B
L
L
H
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
*
A
0 =
B
0,
A
1 =
B
1,
A
2 =
B
2, etc.
A, B
A = B*
A
≠
B
A = B*
A
≠
B
Output
O
A = B
L
H
H
H
2
IDT74FCT521AT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OS
V
OH
V
OL
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Output LOW Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= Min
V
IN
= V
IH
or V
IL
—
I
OH
= –8mA
I
OH
= –15mA
I
OL
= 48mA
V
I
= 2.7V
V
I
= 0.5V
Min.
2
—
—
—
—
—
–60
2.4
2
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
–120
3.3
3
0.3
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
–225
—
—
0.5
—
1
µA
V
mA
V
V
mV
mA
Unit
V
V
µA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT74FCT521AT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
ΔI
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
One Bit Toggling
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
—
1.5
1.8
3.5
4.5
mA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input; (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
ΔI
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
CP
/2+ f
i
N
i
)
I
CC
= Quiescent Current
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
Ax or Bx to
O
A
=
B
Propagation Delay
I
A
=
B
to
O
A
=
B
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
74FCT521AT
Min.
(2)
Max.
1.5
7.2
1.5
6
74FCT521CT
Min.
(2)
Max.
1.5
4.5
1.5
4.1
Unit
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT74FCT521AT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500W
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
50pF
C
L
500W
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Octal Link
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
Pulse Width
Octal Link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
1.5V
0V
3.5V
1.5V
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
V
OH
0V
Octal Link
t
PLZ
V
OL
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
