MX23L8103
8M-BIT MASK ROM
FEATURES
• Bit organization
- 1M x 8 (byte mode)
- 512K x 16 (word mode)
• Fast access time
- Random access:70ns(max.)
• Current
- Operating:15mA
- Standby:5uA
• Supply voltage
- 2.7V ~ 3.6V
• Package
- 48 pin TSOP(12mm x 20mm)
- 48 ball mini BGA (6mm x 8mm, ball pitch 0.8mm, ball
size 0.3mm)
• Temperature
- -40 ~ 85° C
PIN DESCRIPTION
Symbol
A0~A18
D0~D14
D15/A-1
CE#
OE#
Byte#
VCC
VSS
NC
Pin Function
Address Inputs
Data Outputs
D15 (Word Mode)/ LSB Address
(Byte Mode)
Chip Enable Input
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
No Connection
PIN CONFIGURATION
48 TSOP (Top View)
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
NC
NC
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
D11
D3
D10
D2
D9
D1
D8
D0
OE#
VSS
CE#
A0
MX23L8103
(Normal Type)
P/N:PM0622
REV. 1.7, MAY 03, 2004
1
MX23L8103
48 mini BGA (Top View, Ball Down)
A1
A3
B1
A4
C1
A2
D1
A1
E1
A0
F1
CE#
G1
OE#
H1
Vss
A2
A7
B2
A17
C2
A6
D2
A5
E2
D0
F2
D8
G2
D9
H2
D1
A3
NC
B3
NC
C3
A18
D3
NC
E3
D2
F3
D10
G3
D11
H3
D3
A4
NC
B4
NC
C4
NC
D4
NC
E4
D5
F4
D12
G4
Vcc
H4
D4
A5
A9
B5
A8
C5
A10
D5
A11
E5
D7
F5
D14
G5
D13
H5
D6
A6
A13
B6
A12
C6
A14
D6
A15
8.0 mm
E6
A16
F6
BYTE#
G6
D15/A-1
H6
Vss
6.0 mm
ORDER INFORMATION
Part No.
MX23L8103TC-70
MX23L8103TC-90
MX23L8103TC-12
MX23L8103TI-70
MX23L8103TI-90
MX23L8103TI-12
MX23L8103XI-70
MX23L8103XI-90
MX23L8103XI-12
Speed
70ns
90ns
120ns
70ns
90ns
120ns
70ns
90ns
120ns
Package
48 pin TSOP
48 pin TSOP
48 pin TSOP
48 pin TSOP
48 pin TSOP
48 pin TSOP
48 ball mini BGA
48 ball mini BGA
48 ball mini BGA
Grade
Commercial
Commercial
Commercial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Note: Industrial grade temperature: -40 ~ 85° C
Commercial grade temperature: 0 ~ 70° C
MODE SELECTION
CE#
H
L
L
L
P/N:PM0622
OE#
X
H
L
L
Byte#
X
X
H
L
D15/A-1
X
X
Output
Input
D0~D7
High Z
High Z
D0~D7
D0~D7
D8~D15
High Z
High Z
D8~D15
High Z
Mode
-
-
Word
Byte
Power
Stand-by
Active
Active
Active
REV. 1.7, MAY 03, 2004
2
MX23L8103
ABSOLUTE MAXIMUM RATINGS
Item
Supply Voltage Relative to VSS
Voltage on any Pin Relative to VSS
Ambient Operating Temperature
Storage Temperature
Symbol
VCC
VIN
Topr
Tstg
Ratings
-0.3V to 4.3V
-0.3V to 3.9V
-40° C to 85° C
-65° C to 125° C
DC CHARACTERISTICS
(Ta = -40° C ~ 85° C, VCC = 2.7V~3.6V)
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (CMOS)
Input Capacitance
Output Capacitance
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC
ISTB
CIN
COUT
MIN.
2.4V
-
2.1V
-0.3V
-
-
-
-
-
-
MAX.
-
0.4V
VCC+0.3V
0.8V
5uA
5uA
15mA
5uA
10pF
10pF
Conditions
IOH = -400uA
IOL = 1.6mA
0V, VCC
0V, VCC
f=5MHz, CE#=VIL, OE#=VIH
all output open
CE#>VCC-0.2V
Ta = 25° C, f = 1MHZ
Ta = 25° C, f = 1MHZ
AC CHARACTERISTICS
(Ta = -40° C ~ 85° C, VCC = 2.7V~3.6V)
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
Symbol
tRC
tAA
tACE
tOE
tOH
tHZ
23L8103-70
MIN.
MAX.
70ns
-
-
70ns
-
70ns
-
30ns
0ns
-
-
20ns
23L8103-90
MIN.
MAX.
90ns
-
-
90ns
-
90ns
-
35ns
0ns
-
-
20ns
23L8103-12
MIN.
MAX.
120ns -
-
120ns
-
120ns
-
50ns
0ns
-
-
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE# or CE# going high, and this parameter guar-
anteed by design over the full voltage and temperature
operating range - not tested.
P/N:PM0622
REV. 1.7, MAY 03, 2004
3
MX23L8103
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
Note:
0V~ 3.0V
5ns
1.5V
1.5V
See Figure
IOH (load)=-0.4mA
DOUT
IOL (load)=1.6mA
C<100pF
30pF output load capacitance for 70 and 90ns
speed grade
100pF output load capacitance for 120ns speed
grade
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
tACE
ADD
tRC
ADD
CE#
tOE
OE#
tAA
tOH
tHZ
DATA
VALID
VALID
VALID
P/N:PM0622
REV. 1.7, MAY 03, 2004
4
MX23L8103
PACKAGE INFORMATION
P/N:PM0622
REV. 1.7, MAY 03, 2004
5
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