PFS704-729EG
HiperPFS
Family
High Power PFC Controller with Integrated
High-Voltage MOSFET
Key Benefits
•
Single chip solution for boost power factor correction (PFC)
•
EN61000-3-2 Class C and D compliant
•
High light load efficiency at 10% and 20% load
•
>95% efficiency from 10% load to full load
•
<130 mW no-load consumption at 230 VAC with output in
regulation
•
<50 mW no-load consumption at 230 VAC in remote off state
•
Frequency adjusted over line voltage, and line cycle
•
Spread-spectrum across >60 kHz window to simplify EMI
filtering requirements
•
Lower boost inductance
•
Provides up to 1 kW peak output power
•
>1 kW peak power delivery in power limit voltage regulation
mode
•
High integration allows smaller form factor, higher power density
designs
•
Incorporates control, gate driver, and high-voltage power
MOSFET
•
Internal current sense reduces component count and system
losses
•
Protection features include: UV, OV, OTP, brown-in/out, cycle-
by-cycle current limit, and power limiting for overload protection
•
Halogen free and RoHS compliant
Applications
•
PC
•
Printer
•
LCD TV
•
Video game consoles
•
•
•
•
Output Power Table
Product
PFS704EG
PFS706EG
PFS708EG
PFS710EG
PFS712EG
PFS713EG
PFS714EG
PFS716EG
Product
PFS723EG
PFS724EG
PFS725EG
PFS726EG
PFS727EG
PFS728EG
PFS729EG
Table 1.
Maximum Continuous
Output Power Rating at
90 VAC
110 W
140 W
190 W
240 W
300 W
300 W
350 W
388 W
Maximum Continuous
Output Power Rating at
180 VAC
255 W
315 W
435 W
540 W
675 W
810 W
900 W
Peak Output Power
Rating at 90 VAC
120 W
150 W
205 W
260 W
320 W
320 W
385 W
425 W
Peak Output Power
Rating at 180 VAC
280 W
350 W
480 W
600 W
750 W
900 W
1000 W
High power adaptors
High power LED lighting
Industrial and appliance
Generic PFC converters
Output Power Table (see Notes on page 9)
+
VCC
D
V
VCC
FB
AC
IN
CONTROL
HiperPFS
S
G
DC
OUT
Figure 1.
Typical Application Schematic.
PI-6021-110810
www.power.com
June 2015
This Product is Covered by Patents and/or Pending Patent Applications.
PFS704-729EG
Section List
Description
................................................................................................................................................................... 3
Product Highlights
....................................................................................................................................................... 3
Pin Functional Description
......................................................................................................................................... 4
Pin Configuration...................................................................................................................................................... 4
Functional Block Diagram ........................................................................................................................................ 4
Functional Description
................................................................................................................................................ 5
Output Power Table ................................................................................................................................................. 9
Application Example
............................................................................................................................................10-11
Design, Assembly, and Layout Considerations
.................................................................................................... 12
Absolute Maximum Ratings
..................................................................................................................................... 19
Parameter Table ................................................................................................................................................19-25
Typical Performance Characteristics
...................................................................................................................... 26
Package Details
......................................................................................................................................................... 27
Part Ordering Information.........................................................................................................................................
28
Part Marking Information
......................................................................................................................................... 28
2
Rev. G 06/15
www.power.com
PFS704-729EG
Description
The HiperPFS™ device family members incorporate a
continuous conduction mode (CCM) boost PFC controller, gate
driver, and high voltage power MOSFET in a single, low-profile
eSIP™ power package that is able to provide near unity input
power factor. The HiperPFS devices eliminate the PFC
converter’s need for external current sense resistors, the power
loss associated with those components, and leverages an
innovative control technique that adjusts the switching frequency
over output load, input line voltage, and even input line cycle.
This control technique is designed to maximize efficiency over
the entire load range of the converter, particularly at light loads.
Additionally, this control technique significantly minimizes the
EMI filtering requirements due to its wide-bandwidth spread
spectrum effect. HiperPFS includes Power Integrations’
standard set of comprehensive protection features, such as
integrated soft-start, UV, OV, brown-in/out, and hysteretic thermal
shutdown. HiperPFS also provides cycle-by-cycle current limit
for the power MOSFET, power limiting of the output for over-
load protection, and pin-to-pin short-circuit protection.
HiperPFS’s innovative variable-frequency continuous conduction
mode of operation (VF-CCM) minimizes switching losses by
maintaining a low average switching frequency, while also
varying the switching frequency in order to suppress EMI, the
traditional challenge with continuous-conduction-mode
solutions. Systems using HiperPFS typically reduce the total X
and Y capacitance requirements of the converter, the inductance
of both the boost choke and EMI noise suppression chokes,
reducing overall system size and cost. Additionally, compared
with designs that use discrete MOSFETs and controllers,
HiperPFS devices dramatically reduce component count and
board footprint while simplifying system design and enhancing
reliability. The innovative variable-frequency, continuous
conduction mode controller enables the HiperPFS to realize all
of the benefits of continuous-conduction mode operation while
leveraging low-cost, small, simple EMI filters.
Many regions mandate high power factor for many electronic
products with high power requirements. These rules are
combined with numerous application-specific standards that
require high power supply efficiency across the entire load
range, from full load to as low as 10% load. High efficiency at
light load is a challenge for traditional PFC approaches in which
fixed MOSFET switching frequencies cause fixed switching
losses on each cycle, even at light loads. HiperPFS simplifies
compliance with new and emerging energy-efficiency standards
over a broad market space in applications such as PCs, LCD
TVs, notebooks, appliances, pumps, motors, fans, printers, and
LED lighting.
HiperPFS advanced power packaging technology and high
efficiency simplifies the complexity of mounting the package
and thermal management, while providing very high power
capabilities in a single compact package; these devices are
suitable for PFC applications from 75 W to 1 kW
Product Highlights
Protected Power Factor Correction Solution
•
Incorporates high-voltage power MOSFET, controller, and gate
driver
•
EN61000-3-2 Class D compliance
•
Integrated protection features reduce external component count
•
Accurate built-in brown-in/out protection
•
Accurate built-in undervoltage (UV) protection
•
Accurate built-in overvoltage (OV) protection
•
Hysteretic thermal shutdown (OTP)
•
Internal power limiting function for overload protection
•
Cycle-by-cycle power switch current limit
•
No external current sense required
•
Provides “lossless” internal sensing via sense-FET
•
Reduces component count and system losses
•
Minimizes high current gate drive loop area
•
Minimizes output overshoot and stresses during start-up
•
Integrated power limit and frequency soft start
•
Improve dynamic response
•
Input line feed-forward gain adjustment for constant loop
gain across entire input voltage range
•
Eliminates up to 40 discrete components for higher reliability
and lower cost
Intelligent Solution for High Efficiency and Low EMI
•
Continuous conduction mode PFC uses novel constant volt/
amp-second control engine
•
High efficiency across load using a UF boost diode
•
Low cost EMI filter
•
Universal input device (PFS704 – PFS716) utilize frequency
sliding technique for light load efficiency improvements
•
>95% efficiency from 10% load to full load at low line input
voltage
•
>96% efficiency from 10% load to full load at high line input
voltage
•
High line input device (PFS723 – PFS729) maintain higher
average switching frequency to minimize boost inductance
and core size
•
>94% efficiency from 10% load to full load
•
Variable switching frequency to simplify EMI filter design
•
Varies over line input voltage to maximize efficiency and
minimize EMI filter requirements
•
Varies with input line cycle voltage by >60 kHz to maximize
spread spectrum effect
Advanced Package for High Power Applications
•
Up to 1 kW peak output power capability in a highly compact
package
•
Simple clip mounting to heat sink
•
Can be directly connected to heat sink with insulation pad
•
Provides thermal resistance equivalent to a TO-220
•
Staggered pin arrangement for simple routing of board traces
and high voltage creepage requirements
•
Single package solution for PFC converter reduces assembly
costs and layout size
3
www.power.com
Rev. G 06/15
PFS704-729EG
Pin Functional Description
VOLTAGE MONITOR (V) Pin:
The V pin is tied to the rectified AC rail through an external
resistor. Internal circuitry detects the peak of the input line
voltage which resembles a full-wave rectified waveform. The
rectified high-voltage bus is connected directly to the V pin
voltage through a large resistor (4 MW for PFS70x and PFS71x;
9 MW for PFS72x) to minimize power dissipation and standby
power consumption. A small ceramic capacitor (0.1
mF
for
PFS70x and PFS71x; 0.047
mF
for PFS72x) is required from the
VOLTAGE MONITOR pin to SIGNAL GROUND pin to bypass
any switching noise present on the rectified bus. This pin also
features both brown-in and brown-out protection.
FEEDBACK (FB) Pin:
The FEEDBACK pin is high input-impedance reference terminal
that connects to a feedback resistor network. This pin will also
feature fast overvoltage and undervoltage detection circuitry
that will disengage the internal power MOSFET in the event of a
system fault. A 10 nF capacitor is required between the
FEEDBACK to SIGNAL GROUND pins; this capacitor must be
placed very close to the device on the PCB to bypass any
switching noise. This pin is also used for loop compensation.
BIAS POWER (VCC) Pin:
This is a 10-12 VDC bias supply used to power the IC. The bias
voltage must be externally clamped to prevent the VCC pin
from exceeding 15 VDC.
VOLTAGE MONITOR (V)
SIGNAL GROUND (G) Pin:
Discrete components used in the feedback circuit, including
loop compensation, decoupling capacitors for the supply (VCC)
and line-sense (V) must be referenced to the G pin.
The
SIGNAL GROUND pin must not be tied to the SOURCE pin.
SOURCE (S) Pin:
This pin is the source connection of the power switch.
DRAIN (D) Pin:
This is the tab and drain connection of the internal power switch.
E Package (eSIP-7G)
Exposed Metal (On Edge)
Internally Connected
to GROUND Pin
Exposed Metal
(On Edge)
Internally
Connected to
DRAIN Pin
Exposed Pad
(Backside)
Internally
Connected to
DRAIN Pin
(see eSIP-7G
Package
Drawing)
PI-5334-083110
1 23 4 5
S
G
VCC
FB
V
7
D
7
D
54 3 2 1
V
FB
VCC
G
S
Figure 2.
Pin Configuration.
BIAS POWER (VCC)
DRAIN (D)
INPUT
LINE INTERFACE
Peak
Detector
M
ON
I
VPK
Input UV
(I
UV-
/I
UV+
)
INTERNAL
SUPPLY
+
-
V
CC+
OTP
SOFT
START
6V
Input Voltage
Emulation
“Off-time derived with
constant Volt-Sec
+
-
V
O
-V
IN
C
INT
7 kHz
Filter
OFF
V
OFF
is a function of the error-voltage (V
E
) and is used to reduce the average
operating frequency as a function of output power for increased efficiency
(PFS704-716).
(V
OFF
= 0.8 V for PFS723-729).
Frequency
I
VPK
Slide
V
E
Comparator
V
OFF
V
E
-
+
Latch
Input UV
FB
OV/UV
V
CC
Sense
FET
Internal
Reference
V
REF
FEEDBACK (FB)
Transconductance
Error-Amplifier
+
-
V
Power
MOSFET
Comparator
+
-
OTP
Driver
LEB
I
S
1 kHz
Filter
M
ON
is the switch current
sense scale factor which
is function of peak line
voltage derived from I
VIN
TIMER
SUPERVISOR
The internal derived error-voltage (V
E
)
regulates the output voltage
C
INT
+
FB
OV
FB
UV
/
FB
OFF
+
-
OCP
-
I
OCP
Fast OV
Comparator
M
ON
I
S
+
-
UV Comparator
SIGNAL GROUND (G)
SOURCE (S)
PI-5333-113010
Figure 3.
Functional Block Diagram.
4
Rev. G 06/15
www.power.com
PFS704-729EG
PI-5335-111610
Functional Description
The HiperPFS is a variable switching frequency boost PFC
solution. More specifically, it employs a constant amp-second
on-time and constant volt-second off-time control algorithm.
This algorithm is used to regulate the output voltage and shape
the input current to comply with regulatory harmonic current
limits (high power factor). Integrating the switch current and
controlling it to have a constant amp-sec product over the
on-time of the switch allows the average input current to follow
the input voltage. Integrating the difference between the output
and input voltage maintains a constant volt-second balance
dictated by the electro-magnetic properties of the boost inductor
and thus regulates the output voltage and power.
More specifically, the control technique sets constant volt-
seconds for the off-time (t
OFF
). The off-time is controlled such
that:
(1)
Since the volt-seconds during the on-time must equal the
volt-seconds during the off-time, to maintain flux equilibrium in
the PFC choke, the on-time (t
ON
) is controlled such that:
(2)
The controller also sets a constant value of charge during each
on-cycle of the power MOSFET. The charge per cycle is varied
gradually over many switching cycles in response to load
changes so it can be regarded as substantially constant for a
half line cycle. With this constant charge (or amp-second)
control, the following relationship is therefore also true:
(3)
Substituting t
ON
from (2) into (3) gives:
(4)
The relationship of (4) demonstrates that by controlling a constant
amp-second on-time and constant volt-second off-time, the input
current I
IN
is proportional to the input voltage V
IN
, therefore
providing the fundamental requirement of power factor correction.
This control produces a continuous mode power switch current
waveform that varies both in frequency and peak current value
across a line half-cycle to produce an input current proportional
to the input voltage.
Control Engine
The controller features a low bandwidth error-amplifier which
connects its non-inverting terminal to an internal voltage
reference of 6 V. The inverting terminal of the error-amplifier is
available on the external FEEDBACK pin which connects to the
external feedback resistor divider, transient load speed-up and
compensation networks to regulate the output voltage.
The internal sense-FET switch current is integrated and scaled
by the input voltage peak detector current sense gain (M
ON
) and
compared with the error-amplifier signal (V
E
) to determine the
V
E
Latch
RESET
V
OFF
Latch
SET
Gate
Drive (Q)
Maximum
ON-time
Minimum
OFF-time
Timing
Supervisor
(V
OUT
-V
IN
)dt
I
S
dt
Figure 4.
Idealized Converter Waveforms.
cycle on-time. Internally the difference between the input and
output voltage is derived and the resultant is scaled, integrated,
and compared to a voltage reference (V
OFF
) to determine the
cycle off-time. Careful selection of the internal scaling factors
produce input current waveforms with very low distortion and
high power factor.
The input voltage is internally synthesized using the switch duty
cycle and a 7 kHz low pass filter. This synthesized input voltage
representation is subtracted from a fixed reference voltage (6 V)
to derive a current source proportional to (V
O
-V
IN
). Please refer to
Figure 3.
Line Feed-Forward Scaling Factor (M
ON
)
The VOLTAGE MONITOR (V) pin current is used internally to
derive the peak of the input line voltage which is used to scale
the gain of the current sense signal through the M
ON
variable.
This contribution is required to reduce the dynamic range of the
control feedback signal as well maintain a constant loop gain
over the operating input line range. This line-sense feed-
forward gain adjustment is proportional to the square of the
peak rectified AC line voltage and is adjusted as a function of V
pin current. The line-sense feed-forward gain is also important
in providing a switch power limit over the input line range.
Besides modifying brown- in/out thresholds, the V pin resistor
also affects power limit of the device
This characteristic is optimized to maintain a relatively constant
internal error-voltage level at full load from an input line of 100
to 230 VAC input (PFS704-716).
Beyond the specified peak power rating of the device, the
internal power limit feature will regulate the output voltage
below the set regulation threshold as a function of output
overload beyond the peak power rating. Figure 5 illustrates the
typical regulation characteristic as function of load.
Soft-Start with Pin-to-Pin Short-Circuit Protection
Since the FEEDBACK pin is the interface for output voltage
regulation (resistor voltage divider to output voltage) as well as
loop compensation (series RC), the typical application circuit of
the HiperPFS requires an external transistor network to overcome
the inherently slow feedback loop response. Specifically, an
5
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Rev. G 06/15
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