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Last Content Update: 02/23/2017
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•
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AD574A–SPECIFICATIONS
Model
RESOLUTION
LINEARITY ERROR @ +25°C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
T
MIN
to T
MAX
UNIPOLAR OFFSET (Adjustable to Zero)
BIPOLAR OFFSET (Adjustable to Zero)
FULL-SCALE CALIBRATION ERROR
(With Fixed 50
Ω
Resistor from REF OUT to REF IN)
(Adjustable to Zero)
TEMPERATURE RANGE
TEMPERATURE COEFFICIENTS
(Using Internal Reference)
T
MIN
to T
MAX
Unipolar Offset
Bipolar Offset
Full-Scale Calibration
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V
CC
= 15 V
±
1.5 V or 12 V
±
0.6 V
V
LOGIC
= 5 V
±
0.5 V
V
EE
= –15 V
±
1.5 V or –12 V
±
0.6 V
ANALOG INPUT
Input Ranges
Bipolar
Unipolar
Input Impedance
10 Volt Span
20 Volt Span
DIGITAL CHARACTERISTICS
1
(T
MIN
–T
MAX
)
Inputs
2
(CE,
CS,
R/C, A
0
)
Logic “1” Voltage
Logic “0” Voltage
Current
Capacitance
Output (DB11–DB0, STS)
Logic “1” Voltage (I
SOURCE
≤
500
µA)
Logic “0” Voltage (I
SINK
≤
1.6 mA)
Leakage (DB11–DB0, High-Z State)
Capacitance
POWER SUPPLIES
Operating Range
V
LOGIC
V
CC
V
EE
Operating Current
I
LOGIC
I
CC
I
EE
POWER DISSIPATION
INTERNAL REFERENCE VOLTAGE
Output Current (Available for External Loads)
3
(External Load Should not Change During Conversion)
PACKAGE OPTIONS
4
Ceramic (D-28)
Plastic (N-28)
PLCC (P-28A)
LCC (E-28A)
1
(@ +25 C with V
CC
= +15 V or +12 V, V
LOGIC
= +5 V, V
EE
= –15 V or –12 V
unless otherwise noted)
AD574AJ
Typ
Max
12
±
1
±
1
Min
AD574AK
Typ
Max
12
±
1/2
±
1/2
Min
AD574AL
Typ
Max
12
±
1/2
±
1/2
Units
Bits
LSB
LSB
Min
11
±
2
±
4
12
±
1
±
4
12
±
1
±
2
Bits
LSB
LSB
0.25
0
+70
0
0.25
+70
0
0.125
+70
% of FS
°C
±
2 (10)
±
2 (10)
±
9 (50)
±
1 (5)
±
1 (5)
±
5 (27)
±
1 (5) LSB (ppm/°C)
±
1 (5) LSB (ppm/°C)
±
2 (10) LSB (ppm/°C)
±
2
±
1/2
±
2
±
1
±
1/2
±
1
±
1
±
1/2
±
1
LSB
LSB
LSB
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
Volts
Volts
Volts
Volts
kΩ
kΩ
+2.0
–0.5
–20
5
+2.4
–20
5
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
Volts
Volts
µA
pF
Volts
Volts
µA
pF
+0.4
+20
–20
5
+0.4
+20
–20
5
+0.4
+20
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.99
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.01
1.5
Volts
Volts
Volts
mA
mA
mA
mW
Volts
mA
AD574ASD
AD574AJN
AD574AJP
AD574AJE
AD574AKD
AD574AKN
AD574AKP
AD574AKE
AD574ALD
AD574ALN
NOTES
Detailed Timing Specifications appear in the Timing Section.
2
12/8 Input is not TTL-compatible and must be hard wired to V
LOGIC
or Digital Common.
3
The reference should be buffered for operation on
±
12 V supplies.
4
D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.
Specifications subject to change without notice.
–2–
REV. B
AD574A
Model
RESOLUTION
LINEARITY ERROR @ +25°C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
T
MIN
to T
MAX
UNIPOLAR OFFSET (Adjustable to Zero)
BIPOLAR OFFSET (Adjustable to Zero)
FULL-SCALE CALIBRATION ERROR
(With Fixed 50
Ω
Resistor from REF OUT to REF IN)
(Adjustable to Zero)
TEMPERATURE RANGE
TEMPERATURE COEFFICIENTS
(Using Internal Reference)
(T
MIN
to T
MAX
)
Unipolar Offset
Bipolar Offset
Full-Scale Calibration
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V
CC
= 15 V
±
1.5 V or 12 V
±
0.6 V
V
LOGIC
= 5 V
±
0.5 V
V
EE
= –15 V
±
1.5 V or –12 V
±
0.6 V
ANALOG INPUT
Input Ranges
Bipolar
Unipolar
Input Impedance
10 Volt Span
20 Volt Span
DIGITAL CHARACTERISTICS
1
(T
MIN
–T
MAX
)
Inputs
2
(CE,
CS,
R/C, A
0
)
Logic “1” Voltage
Logic “0” Voltage
Current
Capacitance
Output (DB11–DB0, STS)
Logic “1” Voltage (I
SOURCE
≤
500
µA)
Logic “0” Voltage (I
SINK
≤
1.6 mA)
Leakage (DB11–DB0, High-Z State)
Capacitance
POWER SUPPLIES
Operating Range
V
LOGIC
V
CC
V
EE
Operating Current
I
LOGIC
I
CC
I
EE
POWER DISSIPATION
INTERNAL REFERENCE VOLTAGE
Output Current (Available for External Loads)
3
(External Load Should not Change During Conversion)
PACKAGE OPTION
4
Ceramic (D-28)
1
Min
AD574AS
Typ
Max
12
±
1
±
1
Min
AD574AT
Typ
Max
12
±
1/2
±
1
Min
AD574AU
Typ Max
12
±
1/2
±
1
Units
Bits
LSB
LSB
11
±
2
±
4
12
±
1
±
4
12
±
1
±
2
Bits
LSB
LSB
0.25
–55
+125
–55
0.25
+125
–55
0.125
+125
% of FS
°C
±
2 (5)
±
4 (10)
±
20 (50)
±
1 (2.5)
±
2 (5)
±
10 (25)
±
1 (2.5) LSB (ppm/°C)
±
1 (2.5) LSB (ppm/°C)
±
5 (12.5) LSB (ppm/°C)
±
2
±
1/2
±
2
±
1
±
1/2
±
1
±
1
±
1/2
±
1
LSB
LSB
LSB
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
Volts
Volts
Volts
Volts
kΩ
kΩ
+2.0
–0.5
–20
5
+2.4
–20
5
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
Volts
Volts
µA
pF
Volts
Volts
µA
pF
+0.4
+20
–20
5
+0.4
+20
–20
5
+0.4
+20
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.99
+5.5
+16.5
–16.5
40
5
30
725
Volts
Volts
Volts
mA
mA
mA
mW
Volts
mA
10.0 10.01
1.5
AD574ASD
AD574ATD
AD574AUD
NOTES
Detailed Timing Specifications appear in the Timing Section.
2
12/8 Input is not TTL-compatible and must be hard wired to V
LOGIC
or Digital Common.
3
The reference should be buffered for operation on
±
12 V supplies.
4
D = Ceramic DIP.
Specifications subject to change without notice.
REV. B
–3–
AD574A
+5V SUPPLY
V
LOGIC
DATA MODE SELECT
12/8
CHIP SELECT
CS
BYTE ADDRESS/
SHORT CYCLE
A
O
READ/CONVERT
R/C
CHIP ENABLE
CE
+12/+15V SUPPLY
V
CC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
V
EE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10V
IN
1
2
3
4
5
6
7
COMP 12
8
9
10
19.95k
11
12
13
5k
9.95k
5k
DAC N
V
EE
10V
REF
I
DAC
I
DAC
=
4 x N x I
REF
I
REF
8k
CLOCK
3k
SAR
12
CONTROL
3
S
T
A
T
E
O
U
T
P
U
T
B
U
F
F
E
R
S
MSB
28
N
I
B
B
L
E
A
N
I
B
B
L
E
B
N
I
B
B
L
E
C
LSB
STATUS
STS
DB11
27
MSB
26 DB10
25 DB9
24 DB8
23 DB7
22 DB6
21 DB5
20 DB4
DIGITAL
DATA
OUTPUTS
19 DB3
18 DB2
17 DB1
DB0
16 LSB
15 DIGITAL COMMON
DC
20V SPAN INPUT 14
20V
IN
AD574A
12
AD574A Block Diagram and Pin Configuration
ABSOLUTE MAXIMUM RATINGS*
(Specifications apply to all grades, except where noted)
V
CC
to Digital Common . . . . . . . . . . . . . . . . . . 0 V to +16.5 V
V
EE
to Digital Common . . . . . . . . . . . . . . . . . . . 0 V to –16.5 V
V
LOGIC
to Digital Common . . . . . . . . . . . . . . . . . . 0 V to +7 V
Analog Common to Digital Common . . . . . . . . . . . . . . .
±
1 V
Control Inputs (CE,
CS,
A
O
12/8, R/C) to
Digital Common . . . . . . . . . . . . . . –0.5 V to V
LOGIC
+ 0.5 V
Analog Inputs (REF IN, BIP OFF, 10 V
IN
) to
Analog Common . . . . . . . . . . . . . . . . . . . . . . . . . V
EE
to V
CC
20 V
IN
to Analog Common . . . . . . . . . . . . . . . . . . . . . .
±
24 V
REF OUT . . . . . . . . . . . . . . . . . . Indefinite Short to Common
Momentary Short to V
CC
Chip Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
Lead Temperature (Soldering, 10 sec). . . . . . . . . . . . . +300°C
Storage Temperature (Ceramic) . . . . . . . . . . –65°C to +150°C
(Plastic) . . . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +100°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
1
Temperature
Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Linearity Error
Max (T
MIN
to T
MAX
)
±
1 LSB
±
1/2 LSB
±
1/2 LSB
±
1 LSB
±
1 LSB
±
1 LSB
Resolution
No Missing Codes
(T
MIN
to T
MAX
)
11 Bits
12 Bits
12 Bits
11 Bits
12 Bits
12 Bits
Max
Full Scale
T.C. (ppm/°C)
50.0
27.0
10.0
50.0
25.0
12.5
AD574AJ(X)
AD574AK(X)
AD574AL(X)
AD574AS(X)
2
AD574AT(X)
2
AD574AU(X)
2
NOTES
1
X = Package designator. Available packages are: D (D-28) for all grades. E (E-28A) for J and K grades and /883B processed S, T
and U grades. N (N-28) for J, K, and L grades. P (P-28A) for PLCC in J, K grades. Example: AD574AKN is K grade in plastic DIP.
2
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to Analog Devices Military Products
Databook.
–4–
REV. B
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