MAXIM INTEGRATED CONFIDENTIAL/DISTRIBUTE ONLY UNDER NDA
EVALUATION KIT AVAILABLE
MAX14656
USB Charger Detection
with Integrated Overvoltage Protector
General Description
The MAX14656 is a USB charger detector compliant with
USB Battery Charging Specification Revision 1.2. The
USB charger detection circuitry detects USB standard
downstream ports (SDPs), USB charging downstream
ports (CDPs), or dedicated charger ports (DCPs), and
controls an external lithium-ion (Li+) battery charger.
The device implements USB Battery Charging
Specification Revision 1.2-compliant detection logic. The
device also includes Apple
®
charger detection that allows
identification of resistor divider networks on D+/D-.
The internal double-pole double-throw (DPDT) USB
switch is compliant to Hi-Speed USB, full-speed USB,
low-speed USB, and UART signals. The device’s internal
switch features low on-resistance, low on-resistance flat-
ness, and very low capacitance. The ID pin controls the
DPDT switch position. The MAX14656 features high-ESD
protection up to ±15kV Human Body Model (HBM)on
CD+, CD-, and ID pins.
The MAX14656 is available in a 16-bump, 0.4mm pitch,
1.8mm x 1.9mm WLP package and operates over the
-40ºC to +85ºC extended temperature range.
Benefits and Features
●
Consumes Less Power
• Low Battery Standby Current 5µA (typ)
●
Delivers USB Compliance and Flexibility
•
Compliant to USB Battery Charging Specification
Revision 1.2
• Data Contact Detection for Foolproof Connector
Insertion Detection
• Dedicated Charger Detection
• Standard Downstream Port Detection
• Charging Downstream Port Detection
• Apple Charger Detection
• Sony
®
Charger Detection*
●
Facilitates System Design
• Integrated Precision 1.5A Overvoltage
Protection (OVP)
• Negative Audio Capable DPDT Hi-Speed USB
Switches
• Automatic Switch and Charger Interface Control
• Full Control by I
2
C Interface
• Interrupt for Device Status Change
●
Saves Board Space
• V
BUS
Connection Capable of 36V
• ±15kV HBM ESD Protection
• 1.8mm x 1.9mm WLP Package
Applications
●
●
●
●
DSCs and Camcorders
Tablet PCs
Smartphones
e-Readers
Ordering Information
and
Typical Operating Circuit
appears
at end of data sheet.
*Contact
factory for the list of compatible chargers.
Apple is a registered trademark of Apple, Inc.
Sony is a registered trademark and registered service mark of Kabushiki Kaisha TA Sony Corporation.
19-6569; Rev 2; 8/17
MAXIM INTEGRATED CONFIDENTIAL/DISTRIBUTE ONLY UNDER NDA
MAX14656
USB Charger Detection
with Integrated Overvoltage Protector
Bump Configuration
TOP VIEW
(BUMPS ON BOTTOM)
1
MAX14656
2
OUT
3
IDBF
4
INT
+
A
V
B
B
CD-
CE
SDA
SCL
C
CD+
GND
BAT
UT
D
ID
TD-
TD+
UR
WLP
(1.8mm × 1.9mm)
Bump Description
BUMP
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
NAME
V
B
OUT
IDBF
INT
CD-
CE
SDA
SCL
CD+
GND
BAT
UT
ID
TD-
TD+
UR
FUNCTION
USB Connector V
BUS
Connection. Bypass V
B
with a 1µF capacitor to GND.
Overvoltage-Protected USB Transceiver V
BUS
Power Output. Bypass OUT with a 1µF capacitor to GND.
Push-Pull Digital ID Buffer Output
Active-Low, Open-Drain, Interrupt Request Fault Output. Connect
INT
to an external pullup resistor.
USB Connector D- Connection
Active-Low, Open-Drain, Charger Control Enable Output. Connect
CE
to an external pullup resistor.
I
2
C Serial-Data Input/Output. Connect SDA to an external pullup resistor.
I
2
C Serial-Clock Input. Connect SCL to an external pullup resistor.
USB Connector D+ Connection
Ground
Battery Connection Input. Bypass BAT with a 1µF capacitor to GND.
UART Tx Line from Device
USB Connector ID Connection. Bypass ID with a 1nF (max) capacitor to GND.
USB Transceiver D- Connection
USB Transceiver D+ Connection
UART Rx Line from Device
www.maximintegrated.com
Maxim Integrated
│
9
MAXIM INTEGRATED CONFIDENTIAL/DISTRIBUTE ONLY UNDER NDA
MAX14656
USB Charger Detection
with Integrated Overvoltage Protector
Figure 12
100%
90%
Figure 11
R
C
1MΩ
CHARGE-CURRENT-
LIMIT RESISTOR
R
D
1.5kΩ
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
I
PEAK
(AMPS)
I
r
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
HIGH-
VOLTAGE
DC
SOURCE
C
S
100pF
STORAGE
CAPACITOR
36.8%
10%
0
0
TIME
t
RL
t
DL
Figure 11. Human Body ESD Test Model
Figure 12. Human Body Current Waveform
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Ordering Information
PART
MAX14656EWE+T
TEMP RANGE
-40°C to +85°C
PIN-
PACKAGE
16 WLP
TOP
MARK
AAG
Human Body Model
Figure 11
shows the Human Body Model, and
Figure 12
shows the current waveform it generates when discharged
into a low-impedance state. This model consists of a
100pF capacitor charged to the ESD voltage of interest
that is then discharged into the device through a 1.5kI
resistor.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Package Information
For the latest package outline information and land patterns (foot-
prints), go to
www.maximintegrated.com/packages.
Note that
a “+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
16 WLP
PACKAGE
CODE
W161C1+1
OUTLINE
NO.
21-0491
LAND
PATTERN NO.
Refer to
Application
Note 1891
www.maximintegrated.com
Maxim Integrated
│
24
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