MX23L8051
8M-BIT [8M x 1] CMOS SERIAL MASK-ROM
FEATURES
GENERAL
•
8,338,608 x 1 bit structure
•
Single Power Supply Operation
-
3.0 to 3.6 volt for read operations
•
Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
•
High Performance
-
Fast access time: 20MHz serial clock (50pF + 1TTL
Load)
•
Low Power Consumption
-
Low active read current: 10mA (typical) at 20MHz
-
Low standby current: 30uA (CMOS)
SOFTWARE FEATURES
• Input Data Format
-
1-byte Command code, 3-byte address, 1-byte byte
address
HARDWARE FEATURES
•
SCLK Input
-
Serial clock input
• SI Input
-
Serial Data Input
• SO Output
-
Serial Data Output
• PACKAGE
-
28-pin SOP (330mil)
GENERAL DESCRIPTION
The MX23L8051 is a CMOS 8,338,608 bit serial Mask
ROM, which is configured as 1,048,576 x 8 internally. The
MX23L8051 features a serial peripheral interface and
software protocol allowing operation on a simple 3- wire
bus. The three bus signals are a clock input (SCLK), a
serial data input (SI), and a serial data output (SO). Serial
peripheral interface access to the device is enabled by CS
input.
The MX23L8051 provide sequential read operation on the
whole chip.
When the device is not in operation and CS is high, it is put
in standby mode and draws less than 30uA DC current.
PIN CONFIGURATIONS
28-PIN SOP (330 mil)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
GND
VCC
NC
NC
NC
SI
SO
CS
SCLK
NC
NC
NC
NC
PIN DESCRIPTION
SYMBOL
CS
SI
SO
SCLK
VCC
GND
NC
DESCRIPTION
Chip Select
Serial Data Input
Serial Data Output
Clock Input
+ 3.3V Power Supply
Ground
No Internal Connection
P/N: PM0838
MX23L8051
REV. 1.1, JUN. 23, 2003
1
MX23L8051
BLOCK DIAGRAM
Address
Generator
X-Decoder
Memory Array
(2048 x 4096)
Page Buffer
Data
Register
Y-Decoder
SI
CS
Mode
Logic
Sense
Amplifier
Output
Buffer
SO
SCLK
Clock Generator
P/N: PM0838
2
REV. 1.1, JUN. 23, 2003
MX23L8051
COMMAND DEFINITION
Command
1st
2nd
3rd
4th
5th
6th
7th
8th
9th
Action
Read Array
52H
AD1
AD2
AD3
BA
X
X
X
X
n bytes read out until CS goes high
(byte)
Note:
1.X is dummy cycle and is necessary
2.AD1 to AD3 are address input data
3.BA is byte address
1-byte command code
Bit7(MSB) Bit6
3-byte address(0 to 0FFFH)
AD1:
X
X
AD2:
A16
A15
AD3:
X
X
1-byte byte address(0 to 7FH)
BA:
X
A6
Bit5
X
A14
X
A5
Bit4
X
A13
X
A4
Bit3
X
A12
X
A3
Bit2
A19
A11
X
A2
Bit1
A18
A10
A8
A1
Bit0
A17
A9
A7
A0
P/N: PM0838
3
REV. 1.1, JUN. 23, 2003
MX23L8051
DEVICE OPERATION
1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until
next CS falling edge. In standby mode, SO pin of this LSI should be High-Z.
2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB
rising edge.
COMMAND DESCRIPTION
(1) Read Array
This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes
sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes
high. The clock to clock out the data is supplied by the master serial peripheral interface.
(2) Standby Mode
When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less
than 30uA.
DATA SEQUENCE
Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially
read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit
7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB)
ADDRESS SEQUENCE
The address assignment is described as follows :
BA: Byte address Bit sequence:
AD1:First Address Bit sequence:
AD2:Second Address Bit sequence:
AD3:Thrid Address Bit sequence:
X
X
A16
X
A6
X
A15
X
A5
X
A14
X
A4
X
A13
X
A3
X
A12
X
A2
A19
A11
X
A1
A18
A10
A8
A0
A17
A9
A7
P/N: PM0838
4
REV. 1.1, JUN. 23, 2003
MX23L8051
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
RATING
Ambient Operating Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
VALUE
0° C to 70° C
-55° C to 125° C
-0.5V to 4.6V
-0.5V to 4.6V
-0.5V to 4.6V
3.During voltage transitions, all pins may overshoot to 4.6V or
-0.5V for period up to 20ns.
4.All input and output pins may overshoot to VCC+0.5V while
VCC+0.5V is smaller than or equal to 4.6V.
2.Specifications contained within the following tables are
subject to change.
NOTICE:
1.Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is stress rating only and functional operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended period may
affect reliability.
Maximum Negative Overshoot Waveform
20ns
Maximum Positive Overshoot Waveform
0V
-0.5V
4.6V
3.6V
20ns
CAPACITANCE
TA = 25
°
C, f = 1.0 MHz
SYMBOL
CIN
COUT
PARAMETER
Input Capacitance
Output Capacitance
MIN.
TYP
MAX.
10
10
UNIT
pF
pF
CONDITIONS
VIN = 0V
VOUT = 0V
P/N: PM0838
5
REV. 1.1, JUN. 23, 2003
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