). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 72173
S-81544-Rev. D, 07-Jul-08
www.vishay.com
1
Si7501DN
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
V
GS(th)
I
GSS
V
DS
= V
GS
, I
D
= - 250 µA
V
DS
= V
GS
, I
D
= 250 µA
V
DS
= 0 V, V
GS
= ± 25 V
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= - 30 V, V
GS
= 0 V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 30 V, V
GS
= 0 V
V
DS
= - 30 V, V
GS
= 0 V, T
J
= 55 °C
V
DS
= 30 V, V
GS
= 0 V, T
J
= 55 °C
On-State Drain Current
a
I
D(on)
V
DS
≥
- 5 V, V
GS
= - 10 V
V
DS
≤
5 V, V
GS
= 10 V
V
GS
= - 10 V, I
D
= - 6.4 A
Drain-Source On-State Resistance
a
R
DS(on)
V
GS
= 10 V, I
D
= 7.7 A
V
GS
= - 6 V, I
D
= - 5.3 A
V
GS
= 4.5 V, I
D
= 6.5 A
Forward Transconductance
a
Diode Forward Voltage
a
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
rr
P-Channel
V
DD
= - 15 V, R
L
= 5
Ω
I
D
≅
- 3 A, V
GEN
= - 10 V, R
G
= 1
Ω
N-Channel
V
DD
= 15 V, R
L
= 5
Ω
I
D
≅
3 A, V
GEN
= 10 V, R
G
= 1
Ω
I
F
= - 1.7 A, dI/dt = 100 A/µs
I
F
= 1.7 A, dI/dt = 100 A/µs
N-Channel
V
DS
= 15 V, V
GS
= 10 V, I
D
= 7.7 A
P-Ch
P-Channel
V
DS
= - 15 V, V
GS
= - 10 V, I
D
= - 6.4 A
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
12.5
9
2.5
2
3.6
1.3
9
3
10
10
20
15
25
20
30
10
25
20
15
15
30
25
40
30
45
15
50
40
ns
Ω
19
14
nC
g
fs
V
SD
V
DS
= - 15 V, I
D
= - 6.4 A
V
DS
= 15 V, I
D
= 7.7 A
I
S
= - 1.7 A, V
GS
= 0 V
I
S
= 1.7 A, V
GS
= 0 V
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
- 25
25
0.041
0.028
0.055
0.040
13
15
- 0.80
0.80
- 1.2
1.2
0.051
0.035
0.075
0.050
S
V
Ω
- 1.0
1.0
-3
3
± 200
± 100
-1
1
-5
5
A
µA
V
nA
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
射频识别(Radio Frequency Identification，RFID)技术是一种利用无线射频通信实现的非接触式自动识别技术，与目前广泛采用的条形码技术相比，RFID具有容量大、识别距离远、穿透能力强、抗污性强等特点。RFID技术已经发展得比较成熟并获得了大规模商用，但超高频RFID技术相对滞后。本文分析了射频芯片nRF9E5的功能特性，并将其用于RFID系统中，设计了一套有源超高频(...[详细]
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