Datasheet> 器件分类 > 半导体> 模拟混合信号IC> TSI721-16GCLY

TSI721-16GCLY: 产品描述PCI Interface IC; 产品类别半导体模拟混合信号IC; 文件大小850KB，共2页; 制造商IDT(艾迪悌); 官网地址http://www.idt.com/

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TSI721-16GCLY概述

PCI Interface IC

TSI721-16GCLY规格参数

参数名称	属性值
Product Attribute	Attribute Value
制造商 Manufacturer	IDT(艾迪悌)
产品种类 Product Category	PCI Interface IC
RoHS	N
类型 Type	Bridge - PCIe to RapidIO
Maximum Clock Frequency	156.25 MHz
Number of Lanes	16 Lane
Number of Ports	1 Port
工作电源电压 Operating Supply Voltage	3.3 V
最小工作温度 Minimum Operating Temperature	0 C
最大工作温度 Maximum Operating Temperature	+ 70 C
安装风格 Mounting Style	SMD/SMT
封装 / 箱体 Package / Case	FCPGA-143
系列 Packaging	Tube
数据速率 Data Rate	16 Gb/s
Supply Current - Max	2070 mA
Data Bus Width	32 bit, 64 bit
Moisture Sensitive	Yes
PCIe Configurations	x4
Pd-功率耗散 Pd - Power Dissipation	2 W
传播延迟时间 Propagation Delay Time	300 ns
工厂包装数量 Factory Pack Quantity	10
Version	Gen2

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Integrated DeviceTechnology

Tsi721 PCIe2 to S-RIO2

Protocol Conversion Bridge

POWER MANAGEMENT | ANALOG & RF |

INTERFACE & CONNECTIVITY

FEATURES

• x4 PCIe V2.1 to x4 S-RIO V2.1

• Single port: x4, x2 or x1 support

• 1.25, 2.5, 3.125 and 5 Gbaud support

• 8 DMA and Messaging channels/engines each

capable of supporting full 20 Gbaud I/O

• 8Kbyte packet buffering per DMA and

Messaging Channel

• 20 Gaud line rate performance for 64 byte or

larger packets, max TLP payload 256 bytes,

max block DMA 64 Mbyte

• PCI Express non-transparent bridging for

transaction mapping

• Lane reversal

• Automatic Polarity inversion for PCI Express

• Typical power 2W

• Reach Support: 60 cm over 2 connectors

• 100, 125, 156.25 MHz S-RIO and PCIe Endpoint

compatible clocking options

• JTAG 1149.1 and 1149.6

• 13x13 mm FCBGA

• Industrial and Commercial options

BENEFITS

• Use RapidIO’s peer to peer networking

performance with PCIe enabled microprocessors

and Network Processors

• Design Heterogeneous systems with RapidIO

and PCI Express

• Execute large block data transfers without

processor involvement for real time signal

processing tasks

• No in house NRE required to develop bridging

solutions with FPGA or ASIC

• Save on FPGA development, board space and

power with Tsi721 solution

• Superior cost and form factor to Ethernet

and Infiniband NICs

• Use a mix of RapidIO and PCIe based payload

processing cards in the same chassis

• Map Block DMA transfers to RapidIO messages

with dedicated DMA engine per messaging

channel, ideal in highly data intensive signal

processing applications

• Superior and deterministic performance and

latency in embedded peer to peer networks

compared to Ethernet and Infiniband solutions

• Provides Server Network Interface Controller

Functionality

TARGET APPLICATIONS

• Defense & Aerospace: Radar, sonar and

navigations systems

• Server and High Performance Computing

• Medical Imaging: CT Scanners, MRIs

• Video: Teleconferencing and Head End

• Wireless: Design Baseband Cards with PCIe

enabled MAC/Control processor with S-RIO

DSPs, S-RIO FPGA and S-RIO backplane

IDT

THE ANALOG + DIGITAL COMPANY

IDT is the industry’s leading supplier of RapidIO

and PCI Express

Interconnect solutions, provid-

ing a broad portfolio of switches, bridges, IP and development platforms for defense, aerospace,

video, imaging and wireless markets. The Tsi721 is IDT’s solution for hardware based PCIe Gen 2

to RapidIO Gen 2 protocol conversion in a bridging device

Tsi721 Device Overview

The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Us-

ing the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking per-

formance of RapidIO while at the same time using multiprocessor clus¬ters that may only be PCIe enabled.

Using the Tsi721, applications that require large amounts of data transferred efficiently without processor

involvement can be executed using the full line rate block DMA+Messaging engines of the Tsi721.

Protocol Conversion and Bridging Functionality

Key to the Tsi721 is the hardware bridging functionality that converts and maps PCIe transactions

to RapidIO. The Tsi721 supports PCIe non transparent bridging for transaction mapping. The Tsi721

has both RapidIO and PCIe endpoints embedded in the bridge. With respect to bridging large

data transfers, each of the DMA/Messaging channels can buffer up to 8K byte PCIe block DMA

trans¬fers on the PCIe side and messages totaling 32 256 byte packets on the RapidIO side. This is

all achieved in a significantly smaller form factor when compared to alternative implementations

in FPGAs or Ethernet/Inifinband NIC devices.

Tsi721 PRODUCT BRIEF

TSI721-16GCLY相似产品对比

	TSI721-16GCLY	TSI721A1-16GCL
描述	PCI Interface IC	PCI Interface IC Protocol Converter Bridge
Product Attribute	Attribute Value	Attribute Value
制造商 Manufacturer	IDT(艾迪悌)	IDT(艾迪悌)
产品种类 Product Category	PCI Interface IC	PCI Interface IC
类型 Type	Bridge - PCIe to RapidIO	Bridge - PCIe to RapidIO
Maximum Clock Frequency	156.25 MHz	156.25 MHz
Number of Lanes	16 Lane	4 Lane
Number of Ports	1 Port	1 Port
最小工作温度 Minimum Operating Temperature	0 C	0 C
最大工作温度 Maximum Operating Temperature	+ 70 C	+ 70 C
系列 Packaging	Tube	Tube
数据速率 Data Rate	16 Gb/s	16 Gb/s
Data Bus Width	32 bit, 64 bit	32/64 bit
工厂包装数量 Factory Pack Quantity	10	10

TSI721-16GCLY

TSI721-16GCLY在线购买

TSI721-16GCLY概述

TSI721-16GCLY规格参数

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