UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
Rev. 01 — 23 June 2008
Product data sheet
1. General description
The UBA2071 and UBA2071A are high voltage ICs intended to drive Cold Cathode
Fluorescent Lamps (CCFLs) or External Electrode Fluorescent Lamps (EEFLs) for
backlighting applications. They can drive a half bridge circuit made up of two NMOSFETs
with a supply voltage of up to 550 V, so the inverter can be supplied directly from a 400 V
PFC bus.
The UBA2071 and UBA2071A contain a controller, a level shifter, a bootstrap diode and
drivers for the external half bridge power switches. It also contains a low frequency PWM
generator, which can be used to control the brightness level of the lamps, using an analog
brightness/dimming control voltage. PWM dimming can also be realized, using a digital
PWM input signal. PWM dimming can be synchronized with other ICs. The lamp current is
controlled by means of a true zero voltage switching resonant control principle, ensuring
lowest possible switch losses in the half bridge power structure.
The UBA2071 is designed to be supplied by a
∆V/∆t
supply from the half bridge circuit that
it drives. The IC itself needs little current and if the IC is off, a clamp protects the supply
voltage from getting too high.
The UBA2071A is designed to be supplied by a fixed 12 V supply. It has a lower supply
start voltage and no supply clamp.
2. Features
I
I
I
I
I
I
I
I
I
I
I
I
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Suitable for operating in a very wide inverter supply voltage range (up to 550 V DC).
Integrated level shifter.
Integrated bootstrap diode.
Lamp current control by means of a true zero voltage switching resonant control
principle.
Sample & Hold circuit, maintaining current control value during PWM lamp-off
situation.
Separately definable time constants for current control loop and PWM dimming
attack/decay setting.
Overvoltage control.
Overcurrent protection.
Ignition failure detection.
Hard switching control.
Arcing detection.
Open/short pin protections on feedback pins.
Integrated, programmable fault timer.
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
I
Bidirectional pin acting both as fault signaling output and input, allowing external fault
interfacing to operate via the integrated fault timer.
I
Brightness level adjustment through PWM dimming.
I
Integrated PWM generator.
I
Power-down mode.
I
Communication pin for master / slave operation.
I
DC blocking capacitor pre-charging sequence.
I
Supply clamp (UBA2071 only).
3. Applications
I
LCD-backlighting, including LCD-TV and LCD-monitor applications. The IC is intended
to drive and control a half bridge inverter with resonant load circuit for CCFLs, but can
also drive an array of External Electrode Fluorescent Lamps (EEFLs).
4. Quick reference data
Table 1.
Quick reference data.
T
amb
= 25
°
C; V
VDD
= 12 V; R
IREF
= 33 k
Ω
; V
EN
= V
VDD
and CPWM connected to a capacitor, unless
otherwise specified. All voltages are measured with respect to signal ground (SGND, pin 10). SGND
and PGND connected together. Currents are positive when flowing into the IC.
Symbol
V
SH
V
VDD
I
VDD
Parameter
voltage on pin SH
voltage on pin VDD
current on pin VDD
EN pin grounded;
V
VDD
= 14.0 V;
UBA2071AT and
UBA2071ATS
oscillating at f
sw(min)
;
C
CF
= 100 pF
disabled;
V
VDD
= 11 V
oscillating;
CF = 100 pF;
GL and GH open
C
CF
= 100 pF;
V
PWMD
= H;
V
CSWP
= 0 V
f
sw(min)
minimum switching
frequency
C
CF
= 100 pF
[1]
[2]
[1]
[2]
Conditions
Min
-
-
-
Typ
-
-
-
Max
550
14
0.22
Unit
V
V
mA
1.2
-
-
1.5
0.16
1.5
1.8
-
-
mA
mA
mA
1.0
1.2
1.4
mA
10
38
2.2
-
40
2.4
100
42
2.6
kHz
kHz
kHz
f
sw(max)
/f
sw(min)
maximum switching
frequency to
minimum switching
frequency ratio
V
ref(creg)
current regulation
reference voltage
1.20
1.26
1.32
V
UBA2071_A_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
2 of 35
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
Table 1.
Quick reference data.
T
amb
= 25
°
C; V
VDD
= 12 V; R
IREF
= 33 k
Ω
; V
EN
= V
VDD
and CPWM connected to a capacitor, unless
otherwise specified. All voltages are measured with respect to signal ground (SGND, pin 10). SGND
and PGND connected together. Currents are positive when flowing into the IC.
Symbol
V
th(ov)(VFB)
Parameter
overvoltage
threshold voltage on
pin VFB
fault time-out time
driver source
current
driver sink
resistance
PWM frequency
duty cycle on pin
PWMD
C
CT
= 100 nF
V
GL
, V
GH
= 4 V;
V
VDD
= V
FS
= 12 V
V
GL
, V
GH
= 2 V;
V
VDD
= V
FS
= 12 V
[1]
[3]
Conditions
Min
2.40
Typ
2.50
Max
2.60
Unit
V
t
to(fault)
I
source(drv)
R
sink(drv)
f
PWM
δ
PWMD
0.85
−105
13.5
75
12
1.00
−90
16.0
-
-
1.15
−75
18.5
1000
100
s
mA
Ω
Hz
%
[1]
[2]
[3]
Given frequency is switching frequency of GL and GH. Sawtooth frequency on CF pin is twice as high.
Can be set by external capacitor
PWMD is active low: A low level on the PWMD pin corresponds with lamps-on. Example:
δ
PWM
= 20 %
means PWMD is during 20 % of each cycle low and the lamps are 20 % of the time on, resulting in a light
output of 20 %.
5. Ordering information
Table 2.
Ordering information
Package
Name
UBA2071T
UBA2071AT
UBA2071TS
UBA2071ATS
SO24
SO24
SSOP24
SSOP24
Description
plastic small outline package; 24 leads; body width 7.5 mm
plastic small outline package; 24 leads; body width 7.5 mm
plastic shrink small outline package; 24 leads;
body width 5.3 mm
plastic shrink small outline package; 24 leads;
body width 5.3 mm
Version
SOT137-1
SOT137-1
SOT340-1
SOT340-1
Type number
UBA2071_A_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
3 of 35
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
6. Block diagram
NONFAULT
CT
bootstrap diode
IREF
VDD
SGND
EN
INTERNAL
SUPPLY
AND
REFERENCE
CIRCUITS
CONTROL
VDD
TIMER
LEVEL-
SHIFTER
FS
GH
high-side
driver
NON-OVERLAP
TIMING
CF
HF
OSCILLATOR
HARD-
SWITCHING
DETECTION
SH
VDD
GL
low-side
driver
CSWP
CVFB
TRACK
AND
SWEEP
PGND
MASTER / SLAVE
COMMUNICATION
VFB
OVER-
VOLTAGE
SENSING
ARCING
DETECTION
OVER-
CURRENT
DETECTION
PWM GENERATOR
IFB
DOUBLE
SIDE
RECTIFIER
LAMP
CURRENT
SENSING
COMM
UBA2071
CIFB PWMA PWMD CPWM
014aaa098
Fig 1.
Block diagram
UBA2071_A_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
4 of 35
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
7. Pinning information
7.1 Pinning
IFB
CIFB
VFB
CVFB
CSWP
CT
CF
IREF
CPWM
1
2
3
4
5
6
7
8
9
24 GH
23 FS
22 SH
21 n.c.
20 n.c.
19 n.c.
18 GL
17 PGND
16 VDD
15 EN
14 PWMA
13 PWMD
014aaa099
UBA2071
SGND 10
COMM 11
NONFAULT 12
Fig 2.
Pin assignment SO24 and SSOP24 package (top view)
7.2 Pin description
Table 3.
Symbol
IFB
CIFB
VFB
CVFB
CSWP
Pin description
Pin
1
2
3
4
5
Description
current feedback input.
current regulation
capacitor.
voltage feedback input
voltage regulation
capacitor
frequency sweep
capacitor
fault timing capacitor
HF-oscillator timing
capacitor
reference current output
PWM timing capacitor
Function
Input signal for the lamp current control loop. Should be connected to a
voltage proportional to the lamp current.
A capacitor must be connected between this pin and the signal ground. It
sets the time constant of the lamp current control loop.
Input signal for the voltage control loop. Should be connected to a voltage
proportional to the transformer output voltage.
A capacitor must be connected between this pin and the signal ground. It
sets the time constant of the voltage control loop.
A capacitor must be connected between this pin and the signal ground. It
sets the time in which the HF frequency is swept up from regulation level to
the maximum frequency and back during PWM dimming.
A capacitor must be connected between this pin and the signal ground. It
sets the time that a fault condition is allowed before the IC shuts down itself.
A capacitor must be connected between this pin and the signal ground. It
sets the minimum switching frequency of the half bridge.
A 33 kΩ resistor must be connected between this pin and the signal ground.
The IC uses it to make accurate internal currents.
If a capacitor is connected between this pin and the signal ground, it sets the
frequency of the PWM oscillator.
If this pin is connected to signal ground the internal PWM oscillator is
disabled.
SGND
COMM
10
11
signal ground
master / slave
communication
Via this pin the IC can communicate with a dedicated slave device.
CT
CF
IREF
CPWM
6
7
8
9
UBA2071_A_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
5 of 35
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