CDM7-600LR
SURFACE MOUNT SILICON
N-CHANNEL
LR POWER MOSFET
7.0 AMP, 600 VOLT
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CDM7-600LR is a
600 Volt N-Channel MOSFET designed for high voltage,
fast switching applications such as Power Factor
Correction (PFC), lighting and power inverters. This
UltraMOS
TM
MOSFET combines high voltage capability
with ultra low rDS(ON), low threshold voltage, and low
gate charge for optimal efficiency.
MARKING: FULL PART NUMBER
DPAK CASE
APPLICATIONS:
•
Power Factor Correction
•
Alternative energy inverters
•
Solid State Lighting (SSL)
FEATURES:
•
High voltage capability (VDS=600V)
•
Low gate charge (Qgs=2.62nC TYP)
•
Ultra low rDS(ON) (0.53Ω TYP)
MAXIMUM RATINGS:
(TC=25°C unless otherwise noted)
SYMBOL
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Continuous Drain Current (Steady State)
ID
Maximum Pulsed Drain Current, tp=10μs
IDM
Continuous Source Current (Body Diode)
IS
Maximum Pulsed Source Current (Body Diode)
Single Pulse Avalanche Energy (Note 1)
Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
Thermal Resistance
Note 1: L=30mH, IAS=3.0A, VDD=100V, RG=25Ω, Initial TJ=25°C
600
30
7.0
28
7.0
28
145
60
-55 to +150
2.08
110
UNITS
V
V
A
A
A
A
mJ
W
°C
°C/W
°C/W
ISM
EAS
PD
TJ, Tstg
Θ
JC
Θ
JA
ELECTRICAL CHARACTERISTICS:
(TC=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
I
GSSF, IGSSR VGS=30V, VDS=0
IDSS
VDS=600V, VGS=0
0.065
BVDSS
VGS=0, ID=250μA
600
VGS(th)
VSD
rDS(ON)
Crss
Ciss
Coss
VGS=VDS, ID=250μA
VGS=0, IS=7.0A
VGS=10V, ID=3.5A
VDS=100V,
VDS=100V,
VDS=100V,
VGS=0, f=1.0MHz
VGS=0, f=1.0MHz
VGS=0, f=1.0MHz
2.0
3.0
0.89
0.53
1.94
440
33
MAX
100
1.0
4.0
1.4
0.58
UNITS
nA
μA
V
V
V
Ω
pF
pF
pF
R2 (10-August 2015)
CDM7-600LR
SURFACE MOUNT SILICON
N-CHANNEL
LR POWER MOSFET
7.0 AMP, 600 VOLT
ELECTRICAL
SYMBOL
Qg(tot)
Qgs
Qgd
td(on)
tr
td(off)
tf
trr
Qrr
CHARACTERISTICS - Continued:
(TC=25°C unless otherwise noted)
TEST CONDITIONS
TYP
VDS=480V, VGS=10V, ID=7.0A (Note 2)
14.5
VDS=480V, VGS=10V, ID=7.0A (Note 2)
2.62
VDS=480V, VGS=10V, ID=7.0A (Note 2)
VDD=300V, VGS=10V, ID=7.0A, RG=24Ω (Note 2)
VDD=300V, VGS=10V, ID=7.0A, RG=24Ω (Note 2)
VDD=300V, VGS=10V, ID=7.0A, RG=24Ω (Note 2)
VDD=300V, VGS=10V, ID=7.0A, RG=24Ω (Note 2)
VGS=0, IS=7.0A, di/dt=100A/μs (Note 2)
VGS=0, IS=7.0A, di/dt=100A/μs (Note 2)
7.4
9.4
26
44
26
283
2.73
UNITS
nC
nC
nC
ns
ns
ns
ns
ns
μC
Note 2: Pulse Width < 300μs, Duty Cycle < 2%
DPAK CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Gate
2) Drain
3) Source
4) Drain
Pin 2 is common to the tab (4)
MARKING: FULL PART NUMBER
R2 (10-August 2015)
w w w. c e n t r a l s e m i . c o m
CDM7-600LR
SURFACE MOUNT SILICON
N-CHANNEL
LR POWER MOSFET
7.0 AMP, 600 VOLT
TYPICAL ELECTRICAL CHARACTERISTICS
R2 (10-August 2015)
w w w. c e n t r a l s e m i . c o m
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1.
2.
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