The following document contains information on Cypress products. The document has the series
name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will
offer these products to new and existing customers with the series name, product name, and
ordering part number with the prefix “CY”.
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2. Enter the keyword (for example, ordering part number) in the
SEARCH PCNS
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Apply.
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4. Download the Affected Parts List file, which has details of all changes
For More Information
Please contact your local sales office for additional information about Cypress products and
solutions.
About Cypress
Cypress is the leader in advanced embedded system solutions for the world's most innovative
automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
high-performance memories help engineers design differentiated products and get them to market
first. Cypress is committed to providing customers with the best support and development
resources on the planet enabling them to disrupt markets by creating new product categories in
record time. To learn more, go to
www.cypress.com.
MB95810K Series
New 8FX 8-bit Microcontrollers
The MB95810K Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of these series contain a variety of peripheral resources.
Features
■
❐
■
Can be used to wake up the device from different low power
consumption (standby) modes
F
2
MC-8FX CPU core
❐
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
Clock
❐
Selectable main clock source
• Main oscillation clock (up to 16.25 MHz, maximum ma-
chine clock frequency: 8.125 MHz)
• External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
• Main CR clock (4 MHz
2%)
• Main CR PLL clock
- The main CR PLL clock frequency becomes 8 MHz
2%
when the PLL multiplication rate is 2.
- The main CR PLL clock frequency becomes 10 MHz
2%
when the PLL multiplication rate is 2.5.
- The main CR PLL clock frequency becomes 12 MHz
2%
when the PLL multiplication rate is 3.
- The main CR PLL clock frequency becomes 16 MHz
2%
when the PLL multiplication rate is 4.
❐
Selectable subclock source
• Suboscillation clock (32.768 kHz)
• External clock (32.768 kHz)
• Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
Timer
❐
8/16-bit composite timer
2 channels
❐
8/16-bit PPG
2 channels
❐
16-bit PPG timer
2 channels
❐
16-bit reload timer
1 channel
❐
Time-base timer
1 channel
❐
Watch prescaler
1 channel
UART/SIO
1 channel
❐
Full duplex double buffer
❐
Capable of clock asynchronous (UART) serial data transfer
and clock synchronous (SIO) serial data transfer
I
2
C bus interface
1 channel
❐
Built-in wake-up function
LIN-UART
❐
Full duplex double buffer
❐
Capable of clock asynchronous serial data transfer and clock
synchronous serial data transfer
External interrupt
12 channels
❐
Interrupt by edge detection (rising edge, falling edge, and
both edges can be selected)
•
8/10-bit A/D converter
12 channels
❐
8-bit or 10-bit resolution can be selected.
Low power consumption (standby) modes
❐
There are four standby modes as follows:
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
❐
In standby mode, two further options can be selected: normal
standby mode and deep standby mode.
I/O port (no. of I/O ports: 58)
❐
General-purpose I/O ports (CMOS I/O): 54
❐
General-purpose I/O ports (N-ch open drain): 4
On-chip debug
❐
1-wire serial control
❐
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
❐
Built-in hardware watchdog timer
❐
Built-in software watchdog timer
Power-on reset
❐
A power-on reset is generated when the power is switched
on.
Low-voltage detection (LVD) reset circuit
❐
The LVD function is enabled by default. For details, see “18.2
Recommended Operating Conditions” in
“Electrical Characteristics”.
❐
The LVD function can be controlled through software.
❐
The LVD reset circuit control register (LVDCC) enables or
disables the LVD reset.
❐
The LVD reset circuit has an internal low-voltage detector.
The combination of detection voltage and release voltage
can be selected from four options.
Comparator
2 channels
❐
Built-in dedicated BGR
❐
The comparator reference voltage can be selected between
the BGR voltage and the comparator pin.
Clock supervisor counter
❐
Built-in clock supervisor counter
Dual operation Flash memory
❐
The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank) simul-
taneously.
Flash memory security function
❐
Protects the content of the Flash memory.
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Cypress Semiconductor Corporation
Document Number: 002-04694 Rev. *B
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised August 7, 2017
MB95810K Series
Contents
Features............................................................................. 1
1. Product Line-up ............................................................ 3
2. Packages And Corresponding Products.................... 5
3. Differences Among Products And Notes On
Product Selection ............................................................. 5
4. Pin Assignment ............................................................ 6
5. Pin Functions................................................................ 7
6. I/O Circuit Type ........................................................... 11
7. Handling Precautions.................................................
7.1 Precautions for Product Design...........................
7.2 Precautions for Package Mounting .....................
7.3 Precautions for Use Environment........................
13
13
14
16
15. I/O Ports.....................................................................
15.1 Port 0.................................................................
15.2 Port 1.................................................................
15.3 Port 2.................................................................
15.4 Port 3.................................................................
15.5 Port 4.................................................................
15.6 Port 5.................................................................
15.7 Port 6.................................................................
15.8 Port 7.................................................................
15.9 Port 8.................................................................
15.10 Port E ..............................................................
15.11 Port F...............................................................
15.12 Port G ..............................................................
30
31
34
39
42
48
51
55
60
63
66
69
72
16. Interrupt Source Table ............................................. 74
17. Pin States In Each Mode .......................................... 75
18. Electrical Characteristics......................................... 78
18.1 Absolute Maximum Ratings............................... 78
18.2 Recommended Operating Conditions ............... 80
18.3 DC Characteristics ............................................ 81
18.4 AC Characteristics............................................. 84
18.5 A/D Converter................................................. 104
18.6 Flash Memory Program/Erase Characteristics 108
19. Sample Characteristics.......................................... 109
20. Ordering Information.............................................. 116
21. Package Dimension................................................ 117
22. Major Changes In This Edition .............................. 119
Document History Page ............................................... 120
Sales, Solutions, and Legal Information .................... 121
8. Notes On Device Handling......................................... 16
9. Pin Connection ........................................................... 17
10. Block Diagram .......................................................... 19
11. CPU Core................................................................... 20
12. Memory Space ..........................................................
12.1 I/O area (addresses: 0x0000 to 0x007F)...........
12.2 Extended I/O area
(addresses: 0x0F80 to 0x0FFF) ................................
12.3 Data area...........................................................
12.4 Program area ....................................................
12.5 Memory space map...........................................
21
21
21
21
21
22
13. Areas For Specific Applications ............................. 23
14. I/O Map....................................................................... 24
Document Number: 002-04694 Rev. *B
Page 2 of 121
MB95810K Series
1. Product Line-up
Part number
MB95F814K
Parameter
MB95F816K
MB95F818K
Type
Clock
supervisor
counter
Flash memory
capacity
RAM capacity
Power-on reset
Low-voltage
detection reset
Reset input
•
•
•
CPU functions
•
•
•
General-
purpose I/O
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
: 58
: 54
:4
Flash memory product
It supervises the main clock oscillation and the subclock oscillation.
20 Kbyte
512 bytes
36 Kbyte
1 Kbyte
Yes
Controlled through software
Selected through software
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (machine clock frequency = 16.25 MHz)
: 0.6 µs (machine clock frequency = 16.25 MHz)
60 Kbyte
2 Kbyte
• I/O port
• CMOS I/O
• N-ch open drain
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
• Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
software
watchdog timer • The sub-CR clock can be used as the source clock of the software watchdog timer.
Wild register
LIN-UART
8/10-bit
A/D converter
It can be used to replace 3 bytes of data.
•
•
•
•
A wide range of communication speed can be selected by a dedicated reload timer.
It has a full duplex double buffer.
Both clock synchronous serial data transfer and clock asynchronous serial data transfer are enabled.
The LIN function can be used as a LIN master or a LIN slave.
12 channels
8-bit or 10-bit resolution can be selected.
2 channels
• The timer can be configured as an “8-bit timer × 2 channels” or a “16-bit timer × 1 channel”.
8/16-bit
• It has the following functions: interval timer function, PWC function, PWM function and input capture
composite timer function.
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
External
interrupt
12 channels
• Interrupt by edge detection (The rising edge, falling edge, and both edges can be selected.)
• It can be used to wake up the device from different standby modes.
Page 3 of 121
Document Number: 002-04694 Rev. *B
MB95810K Series
Part number
MB95F814K
Parameter
MB95F816K
MB95F818K
On-chip debug
• 1-wire serial control
• It supports serial writing (asynchronous mode).
1 channel
• Data transfer with UART/SIO is enabled.
• It has a full duplex double buffer, variable data length (5/6/7/8 bits), an internal baud rate generator
and an error detection function.
• It uses the NRZ type transfer format.
• LSB-first data transfer and MSB-first data transfer are available to use.
• Both clock asynchronous (UART) serial data transfer and clock synchronous (SIO) serial data transfer
are enabled.
1 channel
• Master/slave transmission and receiving
• It has the following functions: bus error function, arbitration function, transmission direction detection
function, wake-up function, and functions of generating and detecting repeated START conditions.
2 channels
• Each channel can be used as an “8-bit timer
2 channels” or a “16-bit timer
1 channel”.
• The counter operating clock can be selected from eight clock sources.
2 channels
• PWM mode and one-shot mode are available to use.
• The counter operating clock can be selected from eight clock sources.
• It supports external trigger start.
1 channel
•
•
•
•
Two clock modes and two counter operating modes are available to use.
It can output square wave.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
Two counter operating modes: reload mode and one-shot mode
UART/SIO
I
2
C bus
interface
8/16-bit PPG
16-bit PPG
timer
16-bit reload
timer
• Count clock: it can be selected from eight clock sources from the watch prescaler.
Watch counter • The counter value can be selected from 0 to 63. (The watch counter can count for one minute when
the clock source of one second is selected and 60 is selected as the counter value.)
Watch prescaler Eight different time intervals can be selected.
2 channels
Comparator
The reference voltage of each channel can be selected between the BGR voltage and the comparator
pin.
• It supports automatic programming (Embedded Algorithm), and program/erase/erase-suspend/erase-
resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
• Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
Flash memory
Document Number: 002-04694 Rev. *B
Page 4 of 121
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