IDTF1358NBGI
DPD Demodulator for PA Linearization
G
ENERAL
D
ESCRIPTION
This document describes the specification for the
IDTF1358 Digital Pre-Distortion Demodulator for PA
linearization. This series of devices is offered in 3
variants to cover common UTRA bands.
Datasheet
3200 MHz to 4000 MHz
F
EATURES
Wide flat performance IF BW
Wide RF and LO BWs (~ 800 MHz)
LO can be High or Low Side
Ideal for Multi-Carrier Systems
Drives ADC directly
Ultra linear +41 dBm OIP3
Excellent ACLR performance
200 Ω output impedance
Fully integrated DPD demodulator
Standby Mode w/Fast Recovery
Current draw is 216 mA
6 x 6 mm 36 pin package
COMPETITIVE ADVANTAGE
In typical basestation transmitters, digital pre-distortion
is employed to improve the Transmitter performance.
The signal coming out of the PA is sampled and the
incoming Tx chain I&Q data is pre-distorted to
counteract the distortion inherent in the PA. The PA
signal is adjusted via a digital step attenuator to a lower
level and then sub-sampled at an IF frequency of ~200
MHz which necessitates the need for a highly linear
demodulator to downmix to quadrature IF from the
Transmit frequency. By sampling IF_I and IF_Q
independently and then digitally combining these signals,
an effective doubling of the sample rate can be achieved.
Any distortion in this path will degrade the performance
of the DPD algorithm. By utilizing an ultra-linear
demodulator w/integrated DSA such as the IDTF1358,
the ACLR and/or power consumption of the full Tx
system can be improved significantly.
GlitchFree
TM
Technology gives better gain
control
Zero-Distortion
TM
eliminates the need for a
second IF amplifier in the channel
ACLR is reduced for the full channel
Power Consumption is reduced by 40%
Integrates 2 BPFs, 2 Baluns, and a SPDT RF
switch
F
UNCTION
B
LOCK
D
IAGRAM
TM
Zero-Distortion
TM
TM
Glitch-Free
TM
CLK
DATA
CSb
SPI
DEC
IF
I
Bias
Ctrl
.
STBY
I
SET
2
90
O
I
BIAS
RF
X
RF
Y
IF
Q
LO
O
RDERING
I
NFORMATION
Omit IDT
prefix
0.8 mm height Tape &
package
Reel
IDTF1358NBGI8
RF product Line
Green
Industrial
Temp range
Zero-Distortion
TM
, Glitch-Free
TM
, DPD Receiver
1
Rev O, June 2015
IDTF1358NBGI
DPD Demodulator for PA Linearization
A
BSOLUTE
M
AXIMUM
R
ATINGS
Parameter
V
CC
to GND
DATA,CSb, CLK, SW_Latch
STBY
IF_I+, IF_I-, IF_Q+, IF_Q-,
RF_INX, RF_INY
LO_IN
LO_ADJ to Ground
IF_BiasI, IF_BiasQ to Ground
Maximum RF Input Power
(RFIN_X, RFIN_Y)
Continuous Power Dissipation
Junction Temperature
Storage Temperature Range
Lead Temperature (soldering, 10s)
ElectroStatic Discharge – HBM
(JEDEC/ESDA JS-001-2012)
ElectroStatic Discharge – CDM
(JEDEC 22-C101F)
Datasheet
3200 MHz to 4000 MHz
Symbol
V
CC
V
Logic
V
Logic-Stby
I
IF
V
RF
V
LO
V
LObias
V
IFbias
P
RFIN
P
diss
T
j
T
st
Min
-0.3
0.0
0.0
1.00
-0.3
-0.3
+2.1
-0.3
Max
+5.5
3.6
V
CC
V
cc
+ 0.30
+0.30
+0.30
+4.0
+1.20
+27
2.5
150
Units
V
V
V
V
V
V
V
dBm
W
°C
°C
°C
Volts
Volts
-65
150
260
1000
(Class 1C)
500
(Class C4)
Stresses above those listed above may cause permanent damage to the device. Functional operation of the device at
these or any other conditions above those indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD C
AUTION
This product features proprietary protection circuitry. However, it may be damaged if subjected to
high energy ESD. Please use proper ESD precautions when handling to avoid damage or loss of
performance
.
P
ACKAGE
T
HERMAL AND
M
OISTURE
C
HARACTERISTICS
θ
JA
(Junction – Ambient)
θ
JC
(Junction – Case) [The Case is defined as the exposed paddle]
Moisture Sensitivity Rating (Per J-STD-020)
40 °C/W
3 °C/W
MSL1
Zero-Distortion
TM
, Glitch-Free
TM
, DPD Receiver
2
Rev O, June 2015
IDTF1358NBGI
DPD Demodulator for PA Linearization
F1358 R
ECOMMENDED
O
PERATING
C
ONDITIONS
Parameter
Supply Voltage(s)
Operating Temperature Range
RF Freq Range - Linearity
Datasheet
3200 MHz to 4000 MHz
Symbol
V
CC
T
CASE
F
RF-LIN
Conditions
All VCC pins
Case Temperature
ATTN = 0 dB
P
RF
= -11 dBm/Tone
F
IF
= 200 MHz
OIP3 > +35 dBm
ATTN = 0 dB
RF_INX
F
LO
= 3180-3500 MHz
Gain Delta < 2.5 dB
Min
4.75
-40
3200
Typ
5.00
Max
5.25
105
4000
Unit
s
V
°C
MHz
RF Freq Range - Oversampled
LO Freq Range
LO Power
F
RF-OS
F
LO
P
LO
3200
3100
-3
4000
3800
3
MHz
MHz
dBm
IF Freq Range - Linearity
F
IF-LIN
ATTN = 0 dB
RF_INX
P
RF
= -11 dBm/Tone
F
RF
= 3600 MHz
OIP3 > +35 dBm
ATTN = 0 dB
RF_INX
F
LO
= 3180-3500 MHz
Gain Delta < 2.5 dB
Single Ended
Single Ended
Differential
100
300
MHz
IF Freq Range- Oversampled
F
IF-OS
Z
RF_INX
Z
RF_INY
Z
LO
Z
IF_I
Z
IF_Q
20
500
MHz
RF Source Impedance
LO Source Impedance
IF Load Impedance
50
50
200
Ω
Ω
Ω
Zero-Distortion
TM
, Glitch-Free
TM
, DPD Receiver
3
Rev O, June 2015
IDTF1358NBGI
DPD Demodulator for PA Linearization
F1358 S
PECIFICATION
Datasheet
3200 MHz to 4000 MHz
Specifications apply at V
CC
= +5.00 V, T
CASE
= +25 °C, F
RF
= 3455 MHz, G
max
, P
RF
= -11 dBm, F
LO
= 3255 MHz,
P
LO
= 0 dBm, STBY = GND, = V
IH
= 3.3 V, V
IL
= 0.0 V unless otherwise noted. Trace, Connector, and external
transformer losses are de-embedded.
Parameter
Logic Input High
Logic Input Low
Logic Current
Standby Mode Logic
Supply Current
Attenuator Range
Attenuator Step
Gain
Return Loss, RF ports
Return Loss, LO port
Return Loss, IF ports
Noise Figure
Output IP3
Output IP2
Second Harmonic
Input Compression
Symbol
V
IH
V
IL
I
IH,
I
IL
STBY
I
CC_ON
I
CC_STBY
LSB
G
max
G
min
S
RFX
, S
RFY
S
LO
S
IFI
, S
IFI
NF
0
OIP3
0
OIP3
20
OIP2
0
H2
0
IP1dB-C
0
Conditions
All Control Pins
All Control Pins
All Control Pins
STBY = V
IH
STBY = V
IL
Min
2
-130
Typ
Max
0.5
+10
Units
V
V
μA
Power OFF
Power ON
180
Standby Mode
216
20
25.5
0.5
250
1
25
mA
dB
dB
ATTN = 0 dB
ATTN = 25.5 dB
8.7
-16.5
10.2
-15
16
15
11.7
-13.5
dB
dB
dB
dB
dB
dBm
dBm
dBc
Single Ended
ATTN = 0 dB
ATTN = 0 dB
ATTN = 20 dB, P
RF
= +9 dBm
ATTN = 0 dB
ATTN = 0 dB, P
IF
= -6 dBm
ATTN = 0 dB
Gain delta for RF input power
set at +5 dBm and RF Input
power set at -11 dBm.
F
LO
= 3380 MHz
F
RF
= 3400 to 3880 MHz
F
LO
= 3380 MHz
F
RF
= 3400 to 3880 MHz
20
19
36
41
42
59
-72
0.2
1
dB
Gain Ripple
Group Delay Distortion
Attenuator Step Accuracy
Absolute Attenuator
Accuracy
Note
Note
Note
Note
1:
2:
3:
4:
G
ripple
GDD
DNL
INL
1.6
5
0.2
2.5
2
dB
ns
dB
-0.75
-0.1
0.75
dB
Items in min/max columns in
bold italics
are Guaranteed by Test.
Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
Timing measurements are measured after SPI programming is completed (data latched with LE = HIGH).
Gain across the entire frequency band is affected by the inclusion of the RF switch.
Zero-Distortion
TM
, Glitch-Free
TM
, DPD Receiver
4
Rev O, June 2015
IDTF1358NBGI
DPD Demodulator for PA Linearization
F1358 S
PECIFICATION
Specifications apply at V
CC
= +5.00 V, T
CASE
= +25 °C, F
RF
= 3455 MHz, G
max
, P
RF
= -11 dBm, F
LO
= 3255 MHz,
P
LO
= 0 dBm, STBY = GND, = V
IH
= 3.3 V, V
IL
= 0.0 V unless otherwise noted. Trace, Connector, and external
transformer losses are de-embedded.
Datasheet
3200 MHz to 4000 MHz
Parameter
Quadrature Amplitude
Balance
Quadrature Amplitude
Balance over
environmental
Quadrature Phase Balance
Quadrature Phase Balance
over environmental
LO to IF Leakage
RF to IF Isolation
LO to RF Leakage
RF Switch Isolation
Symbol
BAL
G
BAL
G
BAL
Φ
BAL
Φ
ISO
LI
ISO
RI
ISO
LR
ISO
RFX-RXY
Conditions
Over Oversampled Range
T
Amb
= -40 to +85 °C
P
LO
= -3 to +3 dBm
T
Amb
= -40 to +85 °C
P
LO
= -3 to +3 dBm
Output Balun not de-
embedded.
Output Balun not de-
embedded. Reference to P
IF
.
Min
-0.3
-0.5
-1
-1.5
Typ
Max
0.3
+0.5
Units
dB
dB
degrees
degrees
dBm
dBc
dBm
dB
0.3
0.5
-37
-42
-41
-40
1.5
+2.5
-32
-32
RF_INX: 3600 MHz, -11 dBm
LO: 3415 MHz, 0 dBm
50% CSb to 10%/90% settled
to within 0.1dB of final value
of power at IF_I.
Switch Time
EN_ON
EN_OFF
RF_XY
RF_YX
EN Bit set high
EN Bit set low
Switched from RF_INX to
RF_INY. No power at RF_INY.
Switched from RF_INY to
RF_INX. No power at RF_INY
RF_INX: 3600 MHz, -11 dBm
LO: 3415 MHz, 0 dBm
50% CSb to 10%/90% settled
to within 0.1dB of final value
of power at IF_I.
ATTN= 0.0 dB to 25.5 dB
ATTN= 25.5 dB to 0.0 dB
ATTN= 15.5 dB to 16.0 dB
ATTN= 16.0 dB to 15.5 dB
300
300
250
250
16
20
bit
100
50
150
200
ns
SET
DSA Settling time
SET1
SET2
SET3
SET4
ns
Control Interface
Serial Clock Speed
Note
Note
Note
Note
1:
2:
3:
4:
SPI
BIT
SPI
CLK
50
MHz
Items in min/max columns in
bold italics
are Guaranteed by Test.
Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
Timing measurements are measured after SPI programming is completed (data latched with CSb = HIGH).
Gain across the entire frequency band is affected by the inclusion of the RF switch.
Zero-Distortion
TM
, Glitch-Free
TM
, DPD Receiver
5
Rev O, June 2015
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