DATASHEET
ISL80121-5
1A Ultra Low Dropout Linear Regulator with Programmable Current Limiting
The
ISL80121-5
is a low dropout voltage, single output LDO
with programmable current limiting. The ISL80121-5 operates
from input voltages of 5V to 6V with a nominal output voltage
of 5V. Other custom voltage options are available upon
request.
A submicron BiCMOS process is utilized for this product family
to deliver the best in class analog performance and overall
value. The programmable current limiting improves system
reliability of end applications. An external capacitor on the
soft-start pin provides an adjustable soft-starting ramp. The
ENABLE feature allows the part to be placed into a low
quiescent current shutdown mode.
This BiCMOS LDO will consume significantly lower quiescent
current as a function of load compared to bipolar LDOs, which
translates into higher efficiency and packages with smaller
footprints. Quiescent current is modestly compromised to
achieve a very fast load transient response.
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER
ISL80101-ADJ
ISL80101
ISL80101A
ISL80121-5
PROGRAMMABLE
I
LIMIT
No
No
Yes
Yes
I
LIMIT
(DEFAULT)
1.75A
1.75A
1.62A
0.75A
ADJ or FIXED
V
OUT
ADJ
1.8V, 2.5V,
3.3V, 5.0V
ADJ
5.0V
FN7713
Rev 6.00
March 21, 2016
Features
• ±1.8% V
OUT
accuracy guaranteed over line, load and
T
J
= -40°C to +125°C
• Very low 130mV dropout voltage
• High accuracy current limit programmable up to 1.75A
• Very fast transient response
• 210µV
RMS
output noise
• Power-good output
• Programmable soft-start
• Over-temperature protection
• Small 10 Ld DFN package
Applications
• USB devices
• Telecommunications and networking
• Medical equipment
• Instrumentation systems
• Routers and switchers
• Gaming
Typical Applications
5.4V ±10%
V
IN
C
IN
10µF
8
ISL80121-5
10
9
V
IN
V
IN
V
OUT
V
OUT
1
2
5.0V
V
OUT
C
OUT
10µF
5.4V ±10%
V
IN
C
IN
10µF
ISL80121-5
10
9
8
V
IN
V
IN
I
SET
V
OUT
V
OUT
SENSE
1
2
3
R
SENSE
10Ω
C
OUT
10µF
5.0V
V
OUT
I
SET
SENSE
3
R
PG
100kΩ
ON
R
SET
10kΩ
7
6
C
SS
4
ON
OFF
7
6
C
SS
ENABLE
SS
GND
5
PG
4
OFF
R
PG
100kΩ
ENABLE
SS
GND
5
PG
I
LIMIT
= 0.75A
(DEFAULT)
2.9
I LIMIT = 0.75 + ------------------------------
R
k
SET
FIGURE 1.
FIGURE 2.
FN7713 Rev 6.00
March 21, 2016
Page 1 of 12
ISL80121-5
Block Diagram
SS
THERMAL
SHUTDOWN
V
IN
+
-
CURRENT
LIMITER
V
OUT
I
SET
VOLTAGE
REFERENCE
POWER
GOOD
PGOOD
SENSE
ENABLE
GND
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL80121IR50Z
ISL80121-5EVAL2Z
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL80121-5.
For more information on MSL, please see Technical Brief
TB363.
DZAD
Evaluation Board
PART
MARKING
V
OUT
VOLTAGE
5.0V
TEMP. RANGE
(°C)
-40 to +125
PACKAGE
(RoHS Compliant)
10 Ld 3x3 DFN
PKG
DWG. #
L10.3x3
FN7713 Rev 6.00
March 21, 2016
Page 2 of 12
ISL80121-5
Pin Configuration
ISL80121-5
(10 LD 3x3 DFN)
TOP VIEW
V
OUT
V
OUT
SENSE
PG
GND
1
2
3
4
5
PAD
10 V
IN
9 V
IN
8 I
SET
7 ENABLE
6 SS
Pin Descriptions
PIN NUMBER
1, 2
3
PIN NAME
V
OUT
SENSE
DESCRIPTION
Output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See
“External Capacitor
Requirements” on page 9
for more details.
Remote voltage sense for internally fixed V
OUT
options. Parasitic resistance between the V
OUT
pin and the load
causes small voltage drops, which degrade V
OUT
accuracy. For applications that require a stiff V
OUT
, connect the
sense pin to the load.
V
OUT
in regulation signal. Logic low indicates V
OUT
is not in regulation, and must be grounded if not used.
Ground.
External capacitor adjusts inrush current.
V
IN
-independent chip enable. TTL and CMOS compatible.
Current limit setting. Current limit is 0.75A when this pin is left floating. This default value can be increased by
tying R
SET
to GND, or decreased by tying R
SET
to V
IN
. See
“Programmable Current Limit” on page 8
for more
details. Do not short this pin to ground.
Input supply. A minimum of 10µF X5R/X7R input capacitor is required for stability. See
“External Capacitor
Requirements” on page 9
for more details.
EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations. See
“Power
Dissipation and Thermals” on page 9
for more details.
4
5
6
7
8
PG
GND
SS
ENABLE
I
SET
9, 10
-
V
IN
EPAD
FN7713 Rev 6.00
March 21, 2016
Page 3 of 12
ISL80121-5
Absolute Maximum Ratings
(Note
6)
V
IN
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
V
OUT
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
PG, ENABLE, SENSE, SS, I
SET
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
ESD Rating
Human Body Model (Tested per JESD22-A114) . . . . . . . . . . . . . . . .2.5kV
Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . 250V
Latch-up (Tested per JESD78) . . . . . . . . . . . . . . . . . . . . ±100mA at +125°C
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld 3x3 DFN Package (Notes
4, 5).
. . . .
48
7
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
(Note
7)
Junction Temperature Range (T
J
) . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
V
IN
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 6V
I
SET
in Normal Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
≤500mV
SENSE in Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
OUT
PG Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
6. Absolute maximum voltage rating is defined as the voltage applied for a lifetime average duty cycle above 6V of 1%.
7. Electromigration specification defined as lifetime average junction temperature of +110°C where max rated DC current = lifetime average current.
V
IN
= 5.4V,
V
OUT
= 5.0V, T
J
= +25°C, ILOAD = 0A. Applications must follow thermal guidelines of the package to determine worst case junction
temperature. Please refer to
“Functional Description” on page 8
and Tech Brief
TB379.
Boldface limits apply across the operating temperature range, -40°C to +125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
defines
established limits.
PARAMETER
DC CHARACTERISTICS
DC Output Voltage Accuracy
DC Input Line Regulation
V
OUT
5.4V < V
IN
< 6V; 0A < I
LOAD
< 1A
-1.8
-1
1.8
1
%
%
SYMBOL
TEST CONDITIONS
MIN
(Note
8)
TYP
MAX
(Note
8)
UNITS
Electrical Specifications
Unless otherwise noted, all parameters are established over the following specified conditions:
(V
OUT
low line - 5.4V < V
IN
< 6V, V
OUT
= 5V
V
OUT
high
line)/V
OUT
low
line
(V
OUT
no load - 0A < I
LOAD
< 1A
V
OUT
high
load)/V
OUT
no
load
I
Q
I
LOAD
= 0A, 5.4V < V
IN
< 6V
I
LOAD
= 1A, 5.4V < V
IN
< 6V
DC Output Load Regulation
-1
1
%
Ground Pin Current
3
5
0.2
90
0.66
0.75
0.9
160
30
5
7
12
130
0.84
mA
mA
µA
mV
A
A
°C
°C
Ground Pin Current in Shutdown
Dropout Voltage (Note
9)
Output Current Limit
I
SHDN
V
DO
I
LIMIT
ENABLE = 0.2V, V
IN
= 6V
I
LOAD
= 1A, V
SENSE
= 0V
5.4V < V
IN
< 6V, I
SET
is floating
5.4V < V
IN
< 6V, R
SET
= 19.33kΩ
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
TSD
TSDn
5.4V < V
IN
< 6V
5.4V < V
IN
< 6V
FN7713 Rev 6.00
March 21, 2016
Page 4 of 12
ISL80121-5
V
IN
= 5.4V,
V
OUT
= 5.0V, T
J
= +25°C, ILOAD = 0A. Applications must follow thermal guidelines of the package to determine worst case junction
temperature. Please refer to
“Functional Description” on page 8
and Tech Brief
TB379.
Boldface limits apply across the operating temperature range, -40°C to +125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
defines
established limits. (Continued)
PARAMETER
AC CHARACTERISTICS
Input Supply Ripple Rejection
PSRR
f = 1kHz, I
LOAD
= 1A
f = 1kHz, I
LOAD
= 100mA
Output Noise Voltage
ENABLE PIN CHARACTERISTICS
Turn-on Threshold
Hysteresis
ENABLE Pin Turn-on Delay
ENABLE Pin Leakage Current
SOFT-START CHARACTERISTICS
Reset Pull-down Current
Soft-start Charge Current
PG PIN CHARACTERISTICS
V
OUT
PG Flag Threshold
V
OUT
PG Flag Hysteresis
PG Flag Low Voltage
PG Flag Leakage Current
NOTES:
8. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
9. Dropout is defined by the difference in supply V
IN
and V
OUT
when the output is below its nominal regulation.
I
SINK
= 500µA
V
IN
= 6V, PG = 6V
75
84
4
47
0.05
100
1
92
%V
OUT
%
mV
µA
I
PD
I
CHG
ENABLE = 0V, SS = 1V
0.5
-3.3
1
-2
1.3
-0.8
mA
µA
V
EN(HIGH)
V
EN(HYS)
t
EN
5.4V < V
IN
< 6V
5.4V < V
IN
< 6V
C
OUT
= 10µF, I
LOAD
= 1A
V
IN
= 6V, ENABLE = 3V
0.5
10
0.8
80
100
1
1.0
200
V
mV
µs
µA
I
LOAD
= 10mA, BW = 10Hz < f < 100kHz
40
40
210
dB
dB
µV
RMS
SYMBOL
TEST CONDITIONS
MIN
(Note
8)
TYP
MAX
(Note
8)
UNITS
Electrical Specifications
Unless otherwise noted, all parameters are established over the following specified conditions:
FN7713 Rev 6.00
March 21, 2016
Page 5 of 12
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