CALIFORNIA MICRO DEVICES
PACGTL
HIGH PERFORMANCE GTL TERMINATION NETWORK
FOR SOCKET 370 PROCESSORS
Features
24 terminations in a single package
5 chip solution for all 119 GTL terminations
High speed termination network
Center ground pin placement reduces ground
bounce and eases board layout
Very low cross-talk
Saves board space and reduces assembly cost
Applications
High Performance Servers
High Performance Desk Top Systems
Intel Celeron and Pentium CPUs
Application Information
High speed microprocessors demand unique, high speed bus termination. The PACGTL Termination Network provides 24
terminations per package and meets the requirements for high speed terminations. The termination resistor values are 56 or
120 ohms each. Five devices provide the necessary terminations for the 32-bit address bus, 64-bit data bus, and the control
of status signals. Potential board layout solutions are included in this datasheet.
This termination network provides high performance, high reliability, and low cost through manufacturing efficiency. The
termination resistor elements are fabricated using state-of-the-art thin film manufacturing. This integrated solution is silicon-
based and has the same reliability characteristics of todays microprocessor products. The thin film resistors have very high
stability over temperature, over applied voltage, and over life. In addition, the QSOP (SSOP) industry standard packaging is
easy to handle in manufacturing and yields high reliability similar to other semiconductor components.
STANDARD VALUES
R e s i s to r ( R )
56 or 120 Ohms
Ab so l u te To l e ra n c e ( R )
+5%
T CR
+150ppm
Op e ra ti n g Te mp e ra tu re R a n g e
0°C to 70°C
M a x P a c ka g e P o we r R a t i n g ( 7 0 ° C )
1.00W
M i n i mu m I n s u l a t i o n R e s i s t a n c e
10,000Meg
W
Cr o s s -ta l k *
4%
STANDARD CONFIGURATION
R(
W)
56
120
Code
560
121
Power Rating /
Resistor
100 mW
40 mW
* PAC560GTL or PAC121GTL used as a terminator. Signal on a single victim line when all other lines are driven synchronously and
simultaneously.
STANDARD PART ORDE RING INFORMATION
Package
Ordering Part Number
Style
Part Marking
QSOP
QSOP
PAC560GTL
PAC121GTL
Pins
28
28
When placing an order please specify desired shipping: Tubes or Tape & Reel.
All trademarks are the property of their respective holders.
©2000 California Micro Devices Corp. All rights reserved. P/Active
®
is a registered trademark and PAC is a trademark of California Micro Devices.
2/00
C0290498D
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALIFORNIA MICRO DEVICES
RECOMMENDED LAYOUT FOR SOCKET 370 (OPTION A)
FOR CELERON AND MENDOCINO CPUs
PACGTL
11-mil track pitch, single layer
Note: This option requires 1 metal layer in board routing for all 119 GTL termination lines.
© 2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
2/00
CALIFORNIA MICRO DEVICES
PACGTL
RECOMMENDED LAYOUT FOR SOCKET 370 (OPTION B)
FOR CELERON AND MENDOCINO CPUs
Note: This option requires 2 metal layers in board routing for all 119 GTL termination lines. Please note that the second layer only
uses 6 short traces, minimizing potencial interference with other traces, and also minimizing the number of vias.
©2000 California Micro Devices Corp. All rights reserved.
2/00
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
3
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