FAN6756— mWSaver™ PWM Controller
January 2013
FAN6756— mWSaver™ PWM Controller
Features
Single-Ended Topologies, such as Flyback and
Forward Converters
mWSaver™ Technology
Description
The FAN6756 is a next-generation Green Mode PWM
controller with innovative mWSaver™ technology, which
dramatically reduces standby and no-load power
consumption, enabling compliance with worldwide
Standby Mode efficiency guidelines.
An innovative AX-CAP
®
method minimizes losses in the
EMI filter stage by eliminating the X-cap discharge
resistors
while
meeting
IEC61010-1
safety
requirements. “Deep” Burst Mode clamps feedback
voltage and modulates feedback impedance with an
impedance modulator during Burst Mode operation,
which forces the system to operate in a Deep Burst
Mode with minimum switching losses.
Protections ensure safe operation of the power system
in various abnormal conditions. A proprietary frequency-
hopping function decreases EMI emission and built-in
synchronized slope compensation allows more stable
Peak-Current-Mode control over a wide range of input
voltage and load conditions. The proprietary internal line
compensation ensures constant output power limit over
the entire universal line voltage range.
Requiring a minimum number of external components,
FAN6756 provides a basic platform that is well suited for
cost-effective flyback converter designs that require
extremely low standby power consumption.
-
Achieves Low No-Load Power Consumption:
< 30 mW at 230 V
AC
(EMI Filter Loss Included)
-
Eliminates X
®
Capacitor Discharge Resistor Loss
with AX-CAP Technology
-
Linearly Decreases Switching Frequency to
23 kHz
-
Burst Mode Operation at Light-Load Condition
-
Impedance Modulation in “Deep” Burst Mode
-
Low Operating Current (450 µA) in Deep Burst
Mode
-
500 V High-Voltage JFET Startup Circuit to
Eliminate Startup Resistor Loss
Highly Integrated with Rich Features
-
Proprietary Frequency Hopping to Reduce EMI
-
High-Voltage Sampling to Detect Input Voltage
-
Peak-Current-Mode Control with Slope
Compensation
-
Cycle-by-Cycle Current Limiting with Line
Compensation
-
Leading Edge Blanking (LEB)
-
Built-In 7 ms Soft-Start
Advanced Protections
Applications
Flyback power supplies that demand extremely low
standby power consumption, such as:
-
Brown-in / Brownout Recovery
-
Internal Overload / Open-Loop Protection (OLP)
-
V
DD
Under-Voltage Lockout (UVLO)
-
V
DD
Over-Voltage Protection (V
DD
OVP)
-
Over-Temperature Protection (OTP)
-
Current-Sense Short-Circuit Protection (SSCP)
Adapters for Notebooks, Printers, Game Consoles,
etc.
Open-Frame SMPS for LCD TV, LCD Monitors,
Printer Power, etc.
Related Resources
Evaluation Board: FEBFAN6756MR_T03U065A
Ordering Information
Part Number
FAN6756MRMY
FAN6756MLMY
Protections
(1)
OLP OVP OTP SSCP
A/R
L
L
L
L
L
A/R
A/R
Operating
Temperature Range
-40 to +105°C
Package
Packing
Method
8-Pin, Small Outline
Tape & Reel
Package (SOP)
Note:
1. A/R = Auto Recovery Mode protection, L = Latch Mode protection.
© 2011 Fairchild Semiconductor Corporation
FAN6756 • Rev. 2.0.0
www.fairchildsemi.com
FAN6756— mWSaver™ PWM Controller
Application Diagram
Figure 1. Typical Application
Internal Block Diagram
Figure 2. Functional Block Diagram
© 2011 Fairchild Semiconductor Corporation
FAN6756 • Rev. 2.0.0
www.fairchildsemi.com
2
FAN6756— mWSaver™ PWM Controller
Marking Information
Z - Plant Code
X - 1-Digit Year Code
Y - 1-Digit Week Code
TT - 2-Digit Die Run Code
T - Package Type (M=SOP)
P - Y: Green Package
M - Manufacture Flow Code
ZXYTT
6756ML
TPM
ZXYTT
6756MR
TPM
Figure 3. Top Mark
Pin Configuration
SOP-8
GND
FB
NC
HV
1
2
3
4
8
7
6
5
GATE
VDD
SENSE
RT
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
Name
GND
FB
NC
Description
Ground. Placing a 0.1 µF decoupling capacitor between VDD and GND is recommended.
Feedback. The output voltage feedback information from the external compensation circuit is fed
into this pin. The PWM duty cycle is determined by comparing the FB signal with the current-
sense signal from the SENSE pin.
No Connection
High-Voltage Startup. The HV pin is typically connected to the AC line input through two external
diodes and one resistor (R
HV
). This pin is used, not only to charge the V
DD
capacitor during
startup, but also to sense the line voltage. The line voltage information is used for brownout
protection and power-limit line compensation. This pin also is used to intelligently discharge the
EMI filter capacitor when removal of the AC line voltage is detected.
Over-Temperature Protection. An external NTC thermistor is connected from this pin to GND.
Once the voltage of the RT pin drops below the threshold voltage, the controller latches off the
PWM. The RT pin also provides external latch protection. If the RT pin is not connected to the
NTC resistor for over-temperature protection, it is recommended to place a 100 kΩ resistor to
ground to prevent noise interference.
Current Sense. The sensed voltage is used for Peak-Current-Mode control, short-circuit
protection, and cycle-by-cycle current limiting.
Power Supply of IC. Typically a hold-up capacitor connects from this pin to ground. A rectifier
diode, in series with the transformer auxiliary winding, connects to this pin to supply bias during
normal operation.
Gate Drive Output. The totem-pole output driver for the power MOSFET; internally limited to
V
GATE-CLAMP
.
4
HV
5
RT
6
7
8
SENSE
VDD
GATE
© 2011 Fairchild Semiconductor Corporation
FAN6756 • Rev. 2.0.0
www.fairchildsemi.com
3
FAN6756— mWSaver™ PWM Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
VDD
V
FB
V
SENSE
V
RT
V
HV
P
D
JA
T
J
T
STG
T
L
DC Supply Voltage
(2,3)
FB Pin Input Voltage
Parameter
Min.
-0.3
-0.3
-0.3
Max.
30
7.0
7.0
7.0
500
400
150
Unit
V
V
V
V
V
mW
C/W
C
C
C
SENSE Pin Input Voltage
RT Pin Input Voltage
HV Pin Input Voltage
Power Dissipation (T
A
＜50°C)
Thermal Resistance (Junction-to-Air)
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Wave Soldering or IR, 10 Seconds)
Human Body Model,
JEDEC:JESD22-A114
Charged Device Model,
JEDEC:JESD22-C101
All Pins Except HV Pin
(4)
All Pins Except HV Pin
(4)
-40
-55
+125
+150
+260
6000
ESD
V
2000
Notes:
2. All voltage values, except differential voltages, are given with respect to the network ground terminal.
3. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
4. ESD level on HV pin is CDM=1250 V and HBM=500 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. We does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
R
HV
Resistance on HV Pin
Parameter
Min.
150
Typ.
200
Max.
250
Unit
kΩ
© 2011 Fairchild Semiconductor Corporation
FAN6756 • Rev. 2.0.0
www.fairchildsemi.com
4
FAN6756— mWSaver™ PWM Controller
Electrical Characteristics
V
DD
=15 V and T
J
=T
A
=25°C unless otherwise noted.
Symbol
V
DD
Section
V
DD-ON
V
UVLO
V
RESTART
V
DD-OFF
V
DD-OLP
V
DD-LH
V
DD-AC
I
DD-ST
I
DD-OP1
I
DD-OP2
Parameter
Threshold Voltage to Startup
Threshold Voltage to Stop
Switching in Normal Mode
Threshold Voltage to Enable HV
Startup to Charge V
DD
in Normal
Mode
Threshold Voltage to Stop
Operating in Protection Mode
Threshold Voltage to Enable HV
Startup to Charge V
DD
in
Protection Mode
Threshold Voltage to Release
Latch Mode
Threshold Voltage of VDD pin for
Enabling Brown-in
Startup Current
Supply Current in PWM Operation
Supply Current when PWM Stops
Internal Sink Current,
V
DD-OLP
<V
DD
<V
DD-OFF
,
Protection Mode
Condition
V
DD
Rising
V
DD
Falling
V
DD
Falling
V
DD
Falling
V
DD
Falling
V
DD
Falling
Min.
16
5.5
Typ.
17
6.5
4.7
Max.
18
7.5
Unit
V
V
V
10
6
3.5
V
UVLO
+2.5
11
7
4.0
V
UVLO
+3
12
8
4.5
V
UVLO
+3.5
30
1.8
V
V
V
V
µA
mA
µA
V
DD
=V
DD-ON
– 0.16 V
V
DD
=15 V, V
FB
= 3 V,
Gate Open
V
DD
=15 V, V
FB
<1.4 V,
Deep Burst Mode,
Gate Off
V
DD
=
V
DD-OLP
+ 0.1 V
FAN6756MRMY
FAN6756MLMY
90
160
30
23.5
110
24.5
205
7
450
140
210
I
DD-OLP
I
LH
V
DD-OVP
t
D-VDDOVP
V
DD-ZFBR
190
260
µA
µA
µA
Internal Sink Current, V
DD
<V
DD-OLP
,
V
DD
= 5 V
Latch-Protection Mode
Threshold Voltage for V
DD
Over-Voltage Protection
V
DD
Over-Voltage Protection
Debounce Time
V
DD
Threshold Voltage for FB-Pin
Impedance Modulation in Deep
Burst Mode
25.5
300
V
µs
V
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FAN6756 • Rev. 2.0.0
www.fairchildsemi.com
5
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