Supertex inc.
Low Charge Injection, 8-Channel,
Unipolar, Negative High Voltage, Analog Switch
Features
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Low on-resistance, 14
Ω
max.
HVCMOS technology for high performance
3.3 or 5.0V CMOS input logic level
20MHz data shift clock frequency
Very low quiescent power dissipation (-10µA)
Low parasitic capacitance
DC to 50MHz small signal frequency response
-60dB typical off-isolation at 5MHz
CMOS logic circuitry for low power
Excellent noise immunity
Cascadable serial data register with latches
Flexible operating supply voltages
HV2221
General Description
The Supertex HV2221 is a low charge injection, 8-channel,
unipolar, negative high voltage, analog switch integrated
circuit (IC) intended for use in applications requiring high
voltage switching controlled by low voltage control signals,
such as NDT ultrasound flaw detection, medical ultrasound
imaging, piezoelectric transducer drivers, and printers.
Data is input into an 8-bit shift register that can then be
retained in an 8-bit latch. To reduce any possible clock feed-
through noise, the latch enable bar should be left high until all
bits are clocked in. Data is clocked in during the rising edge
of the clock.
Using HVCMOS technology, this device combines high
voltage bilateral DMOS switches and low power CMOS logic
to provide efficient control of high voltage analog signals.
Applications
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NDT metal flaw detection
Medical ultrasound imaging
Piezoelectric transducer drivers
Inkjet printer heads
Optical MEMS modules
Block Diagram
Latches
D
LE
CLR
D
LE
CLR
Level
Shifters
Output
Switches
SW0
CLK
SW1
DIN
8-Bit
Shift
Register
D
LE
CLR
SW2
DOUT
D
LE
CLR
D
LE
CLR
VDD GND
LE
CLR
VNN VPP
SW6
SW7
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
HV2221
Ordering Information
Device
HV2221
Pin Configuration
7.00x7.00mm body
1.60mm height (max)
0.50mm pitch
48-Lead LQFP
1
48
HV2221FG-G
-G indicates package is RoHS compliant (‘Green’)
48-Lead LQFP (FG)
(top view)
Absolute Maximum Ratings
Parameter
V
DD
logic supply
V
PP
-V
NN
differential supply
V
PP
positive supply
V
NN
negative supply
Logic input voltage
Analog signal range
Peak analog signal current/channel
Storage temperature
Power dissipation
Value
-0.5V to +7.0V
260V
-0.5V to V
NN
+260V
+0.5V to -250V
-0.5V to V
DD
+0.3V
V
NN
to V
PP
4.5A
-65°C to 150°C
1.0W
Product Marking
Top Marking
HV2221F G
LLLLLLLLL
Y YW W
Bottom Marking
CCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
48-Lead LQFP (FG)
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device
at the absolute rating level may affect device reliability. All voltages are referenced to device
ground.
Operating Conditions
Sym
V
DD
V
PP
- V
NN
V
PP
V
NN
V
IH
V
IL
V
SIG
T
A
Parameter
Logic power supply voltage
Supply voltage differential
Positive driver supply
Negative high voltage supply
High level input voltage
Low-level input voltage
Analog signal voltage peak-to-peak
Operating free air temperature
Value
3.0V to 5.5V
240V
+15V to +50V
-100V to -225V
0.9V
DD
to V
DD
0V to 0.1V
DD
V
NN
+10V to V
PP
-10V
0
O
C to 70
O
C
Notes:
1.
Power up/down sequence is arbitrary except GND must be powered-up first and
powered-down last.
2.
V
SIG
must be V
NN
≤ V
SIG
≤ V
PP
or floating during power up/down transition.
3.
Rise and fall times of power supplies V
DD
, V
PP
, and V
NN
should not be less than 1.0msec.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
2
Tel: 408-222-8888
www.supertex.com
HV2221
DC Electrical Characteristics
Sym
Parameter
Min
-
-
R
ONS
Small signal switch
on-resistance
-
-
-
-
ΔR
ONS
R
ONL
I
SOL
V
OS(ON)
I
DDQ
I
PPQ
I
NNQ
I
DDQ
I
PPQ
I
NNQ
Small signal switch
on-resistance matching
Large signal switch
on-resistance
Switch off-leakage per switch
DC offset switch on
Quiescent V
DD
supply current
Quiescent V
PP
supply current
Quiescent V
NN
supply current
Quiescent V
DD
supply current
Quiescent V
PP
supply current
Quiescent V
NN
supply current
-
-
-
I
SW
Switch output peak current
-
-
f
SW
Output switching frequency
-
-
I
PP
Average V
PP
supply current
-
-
-
I
NN
Average V
NN
supply current
-
-
I
DD
I
DDQ
I
SOR
I
SINK
C
IN
Average V
DD
supply current
Quiescent V
DD
supply current
D
OUT
source current
D
OUT
sink current
Logic input capacitance
-
-
0.45
0.45
-
-
-
-
-
-
-
-
-
(Over operating conditions unless otherwise specified )
0
O
C
Max
-
-
-
-
-
-
20
-
5.0
300
500
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4.5
10
-
-
10
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.45
0.45
-
+25
O
C
Typ
-
-
-
-
-
-
5.0
9.2
1.0
100
100
-
-
-
-
-
-
4.5
4.0
2.0
-
5.6
5.6
5.6
5.8
5.8
5.8
-
-
0.70
0.70
-
Max
14
14
15
15
23
23
20
-
10
300
500
50
50
-50
50
50
-50
-
-
-
50
7.5
7.5
7.5
7.5
7.5
7.5
4.5
10
-
-
10
+70
O
C
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.40
0.40
-
Max
-
-
-
-
-
-
20
-
15
300
500
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4.5
10
-
-
10
Units Conditions
I
SIG
= 5.0mA
I
SIG
= 200mA
Ω
I
SIG
= 5.0mA
I
SIG
= 200mA
I
SIG
= 5.0mA
I
SIG
= 200mA
%
Ω
μA
mV
V
PP
= +50V
V
NN
= -190V
V
PP
= +40V
V
NN
= -200V
V
PP
= +15V
V
NN
= -225V
I
SIG
= 5.0mA, V
PP
= +40V,
V
NN
= -200V
V
SIG
= 0V, I
SIG
= -1.0A
V
SIG
= V
PP
-10V, V
NN
+10V
100KΩ load
V
OS(OFF)
DC offset switch off
μA
All switches off
μA
All switches on, I
SW
= 5.0mA
V
PP
= +50V
V
NN
= -190V
A
V
SIG
duty cycle
< 0.1%, 1.0μs
V
PP
= +40V
V
NN
= -200V
V
PP
= +15V
V
NN
= -225V
kHz
Duty cycle = 50%
V
PP
= +40V
V
NN
= -200V
50kHz
output switch-
ing frequency
with no load
mA
V
PP
= +50V
V
NN
= -190V
V
PP
= +15V
V
NN
= -225V
V
PP
= +40V
V
NN
= -200V
mA
V
PP
= +50V
V
NN
= -190V
V
PP
= +15V
V
NN
= -225V
50kHz
output switch-
ing frequency
with no load
mA
μA
mA
mA
pF
f
CLK
= 5.0MHz, V
DD
= 5.0V
All logic inputs are static
V
OUT
= V
DD
-0.7V
V
OUT
= 0.7V
---
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
3
Tel: 408-222-8888
www.supertex.com
HV2221
AC Electrical Characteristics
Sym
t
SD
t
WLE
t
DO
t
WCL
t
SU
t
H
f
CLK
t
R
, t
F
t
ON
t
OFF
dv/dt
Parameter
Set up time before LE rises
Time width of LE
Min
-
-
-
-
-
-
-
-
2.0
-
-
-
-
-
-
Maximum V
SIG
slew rate
-
-
-30
K
O
Off isolation
-58
Switch crosstalk
Output switch isolation diode
current
On capacitance SW to GND
-
-
-
-
-
-
Output voltage spike
-
-
-
-
-
QC
Charge injection
-
-
-
-
300
-
-
-
-
-
-
-
-
-
-
-
-58
-60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
18
70
59
115
71
115
56
115
1950
1890
2110
-
-
300
-
-
-
-
-
-
-
-
-
-
-
-58
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
300
-
-
-
-
-
-
-
-
-
-
-
pC
mV
dB
mA
pF
pF
(Over recommended operating conditions: V
DD
= +5.0V, t
R
= t
F
≤5.0ns, 50% duty cycle, V
PP
= +40V, V
NN
= -200V, C
LOAD
= 20pF, unless otherwise specified)
0
O
C
Max
-
-
-
-
-
-
-
-
-
-
-
50
5.0
5.0
20
20
20
-
Min
25
-
-
-
-
55
-
-
2.0
-
-
-
-
-
-
-
-
-30
+25
O
C
Typ
-
56
12
78
30
-
21
7.0
-
-
-
-
-
-
-
-
-
-33
Max
-
-
-
-
-
-
-
-
-
8.0
20
50
5.0
5.0
20
20
20
-
+70
O
C
Min
-
-
-
-
-
-
-
-
2.0
-
-
-
-
-
-
-
-
-30
Max
-
-
-
-
-
-
-
-
-
-
-
50
5.0
5.0
20
20
20
-
Units Conditions
ns
ns
---
V
DD
= 3.0V
V
DD
= 5.0V
V
DD
= 3.0V
V
DD
= 5.0V
---
V
DD
= 3.0V
V
DD
= 5.0V
V
DD
= 3.0 or 5.0V
V
DD
= 3.0V
V
DD
= 5.0V
---
V
SIG
= -100V,
R
LOAD
= 10kΩ to GND
V
PP
= +40V, V
NN
= -200V
V/ns
V
PP
= +50V, V
NN
= -190V
V
PP
= +15V, V
NN
= -225V
dB
f = 5.0MHz, V
OFFSET
= -15V,
1.0KΩ/15pF load
f = 5.0MHz, V
OFFSET
= -15V,
50Ω load
f = 5.0MHz, V
OFFSET
= -15V,
50Ω load
300ns pulse width,
2.0% duty cycle
f = 1.0MHz, V
OFFSET
= -15V
f = 1.0MHz, V
OFFSET
= -15V
V
PP
= +40V, V
NN
= -200V,
R
LOAD
= 50Ω
V
PP
= +50V, V
NN
= -190V,
R
LOAD
= 50Ω
V
PP
= +15V, V
NN
= -225V,
R
LOAD
= 50Ω
V
PP
= +40V, V
NN
= -200V,
V
SIG
= 0V
V
PP
= +50V, V
NN
= -190V,
V
SIG
= 0V
V
PP
= +15V, V
NN
= -225V,
V
SIG
= 0V
Clock delay time to data out
Time width of CLR
Set up time data to clock
Hold time data from clock
Clock frequency
Clock rise and fall times
Turn on time
Turn off time
ns
ns
ns
ns
MHz
ns
μs
K
CR
I
ID
C
SG(OFF)
Off capacitance SW to GND
C
SG(ON)
+V
SPK
-V
SPK
+V
SPK
-V
SPK
+V
SPK
-V
SPK
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
4
Tel: 408-222-8888
www.supertex.com
HV2221
Truth Table
D0
D1
D2
D3
D4
D5
D6
D7
LE
CLR
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Hold Previous State
All Switches Off
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3.
The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch.
4. D
OUT
is high when data in the shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is high.
6. The CLR clear input overrides all other inputs.
Logic Timing Waveforms
D
N+1
DATA IN
50%
D
N
50%
D
N-1
LE
50%
t
WLE
50%
t
SD
CLK
t
SU
t
DO
DATA OUT
t
OFF
V
OUT
(typ)
OFF
ON
CLR
50%
50%
90%
10%
50%
t
ON
50%
t
h
50%
t
WCL
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
5
Tel: 408-222-8888
www.supertex.com
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