PD - 95553B
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Features
HEXFET Power MOSFET
D
IRLR3105PbF
IRLU3105PbF
®
V
DSS
= 55V
R
DS(on)
= 0.037Ω
Logic-Level Gate Drive
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
G
S
I
D
= 25A
Description
This HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per silicon
area. Additional features of this design are a 175°C junction
operating temperature, fast switching speed and improved
repetitive avalanche rating. These features combine to make this
design an extremely efficient and reliable device for use in a wide
variety of applications.
The D-Pak is designed for surface mounting using vapor phase,
infrared, or wave soldering techniques. The straight lead version
(IRLU series) is for through-hole mounting applications. Power
dissipation levels up to 1.5 watts are possible in typical surface
mount applications.
D-Pak
IRLR3105PbF
I-Pak
IRLU3105PbF
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
E
AS
(tested)
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
25
18
100
57
0.38
± 16
61
94
See Fig.12a, 12b, 15, 16
3.4
-55 to + 175
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
2.65
50
110
Units
°C/W
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1
10/01/10
IRLR/U3105PbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Min. Typ. Max. Units
Conditions
55
––– –––
V
V
GS
= 0V, I
D
= 250µA
––– 0.056 ––– V/°C Reference to 25°C, I
D
= 1mA
–––
30
37
V
GS
= 10V, I
D
= 15A
mΩ
–––
35
43
V
GS
= 5.0V, I
D
= 13A
1.0
––– 3.0
V
V
DS
= V
GS
, I
D
= 250µA
15
––– –––
S
V
DS
= 25V, I
D
= 15A
––– ––– 20
V
DS
= 55V, V
GS
= 0V
µA
––– ––– 250
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
––– ––– 200
V
GS
= 16V
nA
––– ––– -200
V
GS
= -16V
––– ––– 20
I
D
= 15A
––– ––– 5.6
nC
V
DS
= 44V
––– ––– 9.0
V
GS
= 5.0V, See Fig. 6 and 13
–––
8.0 –––
V
DD
= 28V
–––
57 –––
I
D
= 15A
–––
25 –––
R
G
= 24Ω
–––
37 –––
V
GS
= 5.0V, See Fig. 10
D
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
G
from package
––– 7.5 –––
and center of die contact
S
––– 710 –––
V
GS
= 0V
––– 150 –––
V
DS
= 25V
–––
28 –––
pF
ƒ = 1.0MHz, See Fig. 5
––– 890 –––
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
––– 110 –––
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
––– 210 –––
V
GS
= 0V, V
DS
= 0V to 44V
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
25
––– –––
showing the
A
G
integral reverse
––– ––– 100
S
p-n junction diode.
––– ––– 1.3
V
T
J
= 25°C, I
S
= 15A, V
GS
= 0V
––– 52
78
ns
T
J
= 25°C, I
F
= 15A, V
DD
= 28V
––– 82 120
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
*
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to application note #AN-994
Notes
through
are on page 11
2
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IRLR/U3105PbF
1000
VGS
TOP
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
BOTTOM 2.0V
100
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
10
10
VGS
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
BOTTOM 2.0V
TOP
1
1
2.0V
0.1
2.0V
0.01
0.1
1
20µs PULSE WIDTH
Tj = 25°C
10
100
0.1
0.1
1
20µs PULSE WIDTH
Tj = 175°C
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000.00
30
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current
(
A)
T J = 25°C
100.00
25
20
T J = 175°C
T J = 175°C
10.00
T J = 25°C
15
10
5
0
1.00
0.10
0.01
2.0
4.0
VDS = 25V
20µs PULSE WIDTH
6.0
8.0
VDS = 25V
20µs PULSE WIDTH
0
10
20
30
40
VGS , Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Typical Forward Transconductance
Vs. Drain Current
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3
IRLR/U3105PbF
1600
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds
Crss = C gd
Coss = Cds + Cgd
20
SHORTED
ID= 15A
VDS= 44V
VDS= 28V
VDS= 11V
VGS , Gate-to-Source Voltage (V)
1200
16
C, Capacitance (pF)
Ciss
800
12
8
Coss
400
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
1
10
100
0
0
10
20
30
40
VDS, Drain-to-Source Voltage (V)
Q G Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
T J = 175°C
10.0
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100
10
100µsec
1msec
1.0
TJ = 25°C
1
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
10msec
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VGS = 0V
1.4
1.6
1.8
0.1
100
1000
VSD, Source-toDrain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRLR/U3105PbF
30
3.0
I
D
= 25A
25
2.5
R
DS(on)
, Drain-to-Source On Resistance
20
2.0
I
D
, Drain Current (A)
(Normalized)
15
1.5
10
1.0
5
0.5
0
25
50
75
100
125
150
175
0.0
-60
-40
-20
0
20
40
60
80
V
GS
= 10V
100 120 140 160 180
T
C
, Case Temperature ( °C)
T
J
, Junction Temperature
(
°
C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10.
Normalized On-Resistance
Vs. Temperature
10
(Z
thJC
)
D = 0.50
1
0.20
Thermal Response
0.10
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
t
1
/ t
2
J
= P
DM
x Z
thJC
+T
C
0.1
0.01
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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