Low Power, 1.62V to 3.63V, 10M Hz to 40M Hz, 1:4 Oscillat or Fanout Buffer
FEATURES
Advanced Oscillator Design for Wide Frequency
Coverage
4 LVCMOS Outputs with Individual OE Control
8mA Output Drive Strength
Input/Output Frequency:
o
Fundamental Crystal: 10MHz to 40MHz
Very Low Jitter and Phase Noise
Low Current Consumption
Single 1.62V to 3.63V Power Supply
Available in QFN-16L and TSSOP-16L
GREEN/RoHS Compliant Packages
DESCRIPTION
The PL135-47 is an advanced oscillator fanout buffer
design for high performance, low-power, small form-
factor applications. The PL135-47 accepts a
fundamental input crystal of 10MHz to 40MHz and
produces four outputs of the same frequency, each
with its own Output Enable pin.
Offered in a small 3 x 3mm QFN or TSSOP package,
the PL135-47 offers the best phase noise and jitter
performance and lowest power consumption of any
comparable IC.
PACKAGE PIN CONFIGURATION
XOUT
GND
XIN
VDD
XIN
OE3
CLK3
VDD
OE0
12
13
14
15
16
1
2
3
4
11
10
9
8
7
6
5
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XOUT
VDD
CLK2
OE2
GND
CLK1
OE1
GND
CLK2
OE2
GND
CLK1
GND
OE3
CLK3
VDD
OE0
CLK0
CLK0
VDD
GND
OE1
VDD
QFN
TSSOP
BLOCK DIAGRAM
CLK0
OE0
OE1
XIN
XOUT
OE2
OE3
CLK3
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1( 408) 944-0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 02/14/11 Page 1
CLK1
XTAL
OSC
CLK2
PL135-47
Low Power, 1.62V to 3.63V, 10M Hz to 40M Hz, 1:4 Oscillat or Fanout Buffer
PACKAGE PIN ASSIGNMENT
Name
CLK0
VDD
GND
OE1
CLK1
OE2
CLK2
XOUT
XIN
OE3
CLK3
OE0
Package Pin #
QFN-16L
1
2, 9, 15
3, 6, 12
4
5
7
8
10
11
13
14
16
(T)SSOP-16L
7
5, 8, 15
2, 9, 12
10
11
13
14
16
1
3
4
6
Type
O
P
P
I*
O
I*
O
O
I
I*
O
I*
Output clock
V
DD
connection
GND connection
Output enable (OE) input for CLK1. Internal pull-up.
Pull low to tri-state CLK1.
Output clock
Output enable (OE) input for CLK2. Internal pull-up.
Pull low to tri-state CLK2.
Output clock
Crystal output. Do not connect when using a reference
clock.
Crystal input
Output enable (OE) input for CLK3. Internal pull-up.
Pull low to tri-state CLK3.
Output clock
Output enable (OE) input for CLK0. Internal pull-up.
Pull low to tri-state CLK0.
Description
* Note:
These pins include an internal 60KΩ pull up.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1( 408) 944-0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 02/14/11 Page 2
PL135-47
Low Power, 1.62V to 3.63V, 10M Hz to 40M Hz, 1:4 Oscillat or Fanout Buffer
LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
Signal Integrity and Termination Considerations
- Keep traces short!
- Trace = Inductor. With a capacitive load this equals
ringing!
- Long trace = Transmission Line. Without proper
termination this will cause reflections (looks like ringing).
- Design long traces as “striplines” or “microstrips” with
defined impedance.
- Match trace at one side to avoid reflections bouncing
back and forth.
Decoupling and Power Supply Considerations
- Place decoupling capacitors as close as possible to
the V
DD
pin(s) to limit noise from the power supply
- Multiple V
DD
pins should be decoupled separately
for best performance.
- Addition of a ferrite bead in series with V
DD
can
help prevent noise from other board sources
- Value of decoupling capacitor is frequency
dependant. Typical value to use is 0.1F.
Typical CMOS termination
Place Series Resistor as close as possible to CMOS output
CMOS Output Buffer
(Typical buffer impedance 20Ω)
To CMOS Input
50Ω line
Crystal Tuning Circuit
Series and parallel capacitors used to fine tune the crystal load to the circuit load.
Crystal
Cst
XIN
1
Cpt
8
Cpt
XOUT
Series Resistor
Use value to match output buffer impedance to
50Ω trace. Typical value 30Ω
CST
–
Series Capacitor, used to lower circuit load to match crystal load. Raises frequency offset.
This can be eliminated by using a crystal with a Cload of equal or greater value than the oscillator.
CPT
–
Parallel Capacitors, Used to raise the circuit load to match the crystal load. Lowers
frequency offset.
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Storage Temperature
Ambient Operating Temperature*
SYMBOL
V
DD
V
I
V
O
T
S
MIN.
-0.5
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
UNITS
V
V
V
C
C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other co nditions above
the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1( 408) 944-0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 02/14/11 Page 3
PL135-47
Low Power, 1.62V to 3.63V, 10M Hz to 40M Hz, 1:4 Oscillat or Fanout Buffer
AC SPECIFICATIONS
PARAMETERS
Crystal Input Frequency
Settling Time
Output Enable Time
V
DD
Sensitivity
Output Rise Time
Output Fall Time
Output to Output Skew
Duty Cycle
CONDITIONS
Fundamental crystal
At power-up (V
DD
> 1.62V)
OE Function; Ta=25º C
Frequency vs. V
DD
, ±10%
15pF Load, 10/90% V
DD
, 3.3V
15pF Load, 90/10% V
DD
, 3.3V
Under all conditions
Under all conditions
45
50
-2
2
2
MIN.
10
TYP.
MAX.
40
2
10
2
4
4
1
55
UNITS
MHz
ms
ns
ppm
ns
ns
ns
%
DC SPECIFICATIONS
PARAMETERS
Supply Current, Dynamic
SYMBOL
CONDITIONS
V
DD
= 3.3V, 25MHz, No Load
I
DD
V
DD
V
OL
V
OH
I
OSD
I
OL
= +4mA, 3.3V
I
OH
= -4mA, 3.3V
V
OL
= 0.4V, V
OH
= 2.4V
2.4
8
V
DD
= 2.5V, 25MHz, No Load
V
DD
= 1.8V, 25MHz, No Load
Operating Voltage
Output Low Voltage
Output High Voltage
Output Current
1.62
MIN
TYP
6.5
4.4
3.2
3.63
0.4
MAX
UNITS
mA
mA
mA
V
V
V
mA
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
Operating Drive Level
Metal Can Crystal
Small SMD Crystal
Shunt Capacitance
ESR Max
Shunt Capacitance
ESR Max
C0
ESR
C0
ESR
SYMBOL
F
XIN
C
L (x ta l)
MIN.
10
15
0.1
2
5.5
40
2.5
60
TYP.
MAX.
40
UNITS
MHz
pF
mW
pF
Ω
pF
Ω
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1( 408) 944-0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 02/14/11 Page 4
PL135-47
Low Power, 1.62V to 3.63V, 10M Hz to 40M Hz, 1:4 Oscillat or Fanout Buffer
PACKAGE DRAWINGS (GREEN PACKAGE COM PLIANT)
QFN 16L
Symbol
A
A1
A3
b
D
E
D1
E1
L
e
Dimension in MM
Min.
Max.
0.07
0.8
0.05
0.05
0.20
0.18
0.30
3.00 BSC
3.00 BSC
--
1.70
--
1.70
0.30
0.50
0.50 BSC
e
L
A
D
D1
Pin1 Dot
b
E1
E
TSSOP 16L
Symbol
A
A1
b
C
D
E
H
L
e
Dimension in MM
Min.
Max.
-
1.20
0.05
0.15
0.19
0.30
0.09
0.20
4.90
5.10
4.30
4.50
6.20
6.60
0.45
0.75
0.635 BSC
E
H
D
A1
e
B
C
L
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1( 408) 944-0800 • fax +1(408) 474-1000 •
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