Operating Temperature Range (Note 4) ...–40°C to 85°C
Specified Temperature Range (Note 5) ....–40°C to 85°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
P1
P3
P9
V
EE
REF
1
2
3
4
5
10 M1
9 M3
8 M9
7 V
CC
6 OUT
ORDER PART
NUMBER
TOP VIEW
LT1991CDD
LT1991IDD
LT1991ACDD
LT1991AIDD
DD PART MARKING*
LBMM
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
EXPOSED PAD CONNECTED TO V
EE
PCB
CONNECTION OPTIONAL
T
JMAX
= 125°C,
θ
JA
= 160°C/W
*Temperature and electrical grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Difference amplifier configuration, V
S
= 5V, 0V or
±15V;
V
CM
= V
REF
= half supply, unless otherwise noted.
SYMBOL
∆G
PARAMETER
Gain Error
CONDITIONS
V
S
=
±15V,
V
OUT
=
±10V;
R
L
= 10k
G = 1; LT1991A
G = 1; LT1991
G = 3 or 9; LT1991A
G = 3 or 9; LT1991
V
S
=
±15V;
V
OUT
=
±10V;
R
L
= 10k
V
S
=
±15V;
V
OUT
=
±10V;
R
L
= 10k
V
S
=
±15V;
V
CM
=
±15.2V
G = 9; LT1991A
G = 3; LT1991A
G = 1; LT1991A
Any Gain; LT1991
P1/M1 Inputs
V
S
=
±15V;
V
REF
= 0V
V
S
= 5V, 0V; V
REF
= 2.5V
V
S
= 3V, 0V; V
REF
= 1.25V
●
●
●
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
GNL
∆G/∆T
CMRR
Gain Nonlinearity
Gain Drift vs Temperature (Note 6)
Common Mode Rejection Ratio,
Referred to Inputs (RTI)
V
CM
Input Voltage Range (Note 7)
2
U
U
W
W W
U
W
ORDER PART
NUMBER
P1
P3
P9
V
EE
REF
1
2
3
4
5
10
9
8
7
6
M1
M3
M9
V
CC
OUT
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 230°C/W
LT1991CMS
LT1991IMS
LT1991ACMS
LT1991AIMS
MS PART MARKING*
LTQD
MIN
TYP
MAX
±0.04
±0.08
±0.06
±0.12
UNITS
%
%
%
%
ppm
ppm/°C
dB
dB
dB
dB
1
0.3
80
75
75
60
–28
–0.5
0.75
100
93
90
70
10
3
27.6
5.1
2.35
V
V
V
1991fb
LT1991
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Difference amplifier configuration, V
S
= 5V, 0V or
±15V;
V
CM
= V
REF
= half supply, unless otherwise noted.
SYMBOL
V
CM
PARAMETER
Input Voltage Range (Note 7)
CONDITIONS
P1/M1 Inputs, P9/M9 Connected to REF
V
S
=
±15V;
V
REF
= 0V
V
S
= 5V, 0V; V
REF
= 2.5V
V
S
= 3V, 0V; V
REF
= 1.25V
P3/M3 Inputs
V
S
=
±15V;
V
REF
= 0V
V
S
= 5V, 0V; V
REF
= 2.5V
V
S
= 3V, 0V; V
REF
= 1.25V
P9/M9 Inputs
V
S
=
±15V;
V
REF
= 0V
V
S
= 5V, 0V; V
REF
= 2.5V
V
S
= 3V, 0V; V
REF
= 1.25V
V
OS
Op Amp Offset Voltage (Note 8)
LT1991AMS, V
S
= 5V, 0V
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
–60
–14
–1.5
–15.2
0.5
0.95
–15.2
0.85
1.0
TYP
MAX
60
16.8
7.3
15.2
4.2
1.95
15.2
3.9
1.9
UNITS
V
V
V
V
V
V
V
V
V
µV
µV
µV
µV
µV
µV
µV
µV
µV/°C
nA
nA
pA
pA
pA
pA
µV
P-P
µV
RMS
µV
P-P
µV
RMS
nV/√Hz
nV/√Hz
15
15
●
50
135
80
160
100
200
150
250
1
5
7.5
500
750
1000
1500
LT1991AMS, V
S
=
±15V
LT1991MS
●
25
25
●
●
●
LT1991DD
∆V
OS
/∆T
I
B
I
OS
Op Amp Offset Voltage Drift (Note 6)
Op Amp Input Bias Current
Op Amp Input Offset Current
LT1991A
●
0.3
2.5
50
50
LT1991
●
Op Amp Input Noise Voltage
0.01Hz to 1Hz
0.01Hz to 1Hz
0.1Hz to 10Hz
0.1Hz to 10Hz
G = 1; f = 1kHz
G = 9; f = 1kHz
P1 (M1 = Ground)
P3 (M3 = Ground)
P9 (M9 = Ground)
M1 (P1 = Ground)
M3 (P3 = Ground)
M9 (P9 = Ground)
●
●
●
●
●
●
●
●
●
●
●
●
●
●
0.35
0.07
0.25
0.05
180
46
630
420
350
315
105
35
900
600
500
450
150
50
0.01
0.02
0.02
0.04
0.3
–30
105
135
2.4
2.7
1170
780
650
585
195
65
0.04
0.06
0.08
0.12
3
e
n
R
IN
Input Noise Voltage Density
Input Impedance (Note 10)
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
%
%
%
%
ppm/°C
ppm/°C
dB
V
1991fb
∆R
Resistor Matching
(Note 9)
450k Resistors, LT1991A
Other Resistors, LT1991A
450k Resistors, LT1991
Other Resistors, LT1991
Resistor Matching
Absolute Value
V
S
=
±1.35V
to
±18V
(Note 8)
∆R/∆T
PSRR
Resistor Temperature Coefficient (Note 6)
Power Supply Rejection Ratio
Minimum Supply Voltage
3
LT1991
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Difference amplifier configuration, V
S
= 5V, 0V or
±15V;
V
CM
= V
REF
= half supply, unless otherwise noted.
SYMBOL
V
OUT
PARAMETER
Output Voltage Swing (to Either Rail)
CONDITIONS
No Load
V
S
= 5V, 0V
V
S
= 5V, 0V
V
S
=
±15V
1mA Load
V
S
= 5V, 0V
V
S
= 5V, 0V
V
S
=
±15V
I
SC
Output Short-Circuit Current (Sourcing)
Output Short-Circuit Current (Sinking)
BW
–3dB Bandwidth
Drive Output Positive;
Short Output to Ground
Drive Output Negative;
Short Output to V
S
or Midsupply
G=1
G=3
G=9
f = 10kHz
G = 1; 0.1V Step; 10% to 90%
G = 9; 0.1V Step; 10% to 90%
G = 1; V
S
= 5V, 0V; 2V Step
G = 1; V
S
= 5V, 0V; –2V Step
G = 1; V
S
=
±15V,
10V Step
G = 1; V
S
=
±15V,
–10V Step
V
S
= 5V, 0V; V
OUT
= 1V to 4V
V
S
=
±15V;
V
OUT
=
±10V
V
S
= 5V, 0V
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
TYP
40
MAX
55
65
110
225
275
300
UNITS
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
kHz
kHz
kHz
kHz
µs
µs
µs
µs
µs
µs
V/µs
V/µs
●
●
150
●
●
●
●
8
4
8
4
12
21
110
78
40
560
3
8
42
48
114
74
GBWP
t
r
, t
f
t
s
Op Amp Gain Bandwidth Product
Rise Time, Fall Time
Settling Time to 0.01%
SR
I
S
Slew Rate
Supply Current
0.06
0.08
0.12
0.12
100
130
110
150
160
210
µA
µA
µA
µA
V
S
=
±15V
●
Note 1:
Absolute Maximum Ratings are those beyond which the life of the
device may be impaired.
Note 2:
The P3/M3 and P9/M9 inputs should not be taken more than 0.2V
beyond the supply rails. The P1/M1 inputs can withstand
±60V
if P9/M9
are grounded and V
S
=
±15V
(see Applications Information section about
“High Voltage CM Difference Amplifiers”).
Note 3:
A heat sink may be required to keep the junction temperature
below absolute maximum ratings.
Note 4:
Both the LT1991C and LT1991I are guaranteed functional over the
–40°C to 85°C temperature range.
Note 5:
The LT1991C is guaranteed to meet the specified performance
from 0°C to 70°C and is designed, characterized and expected to meet
specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1991I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6:
This parameter is not 100% tested.
Note 7:
Input voltage range is guaranteed by the CMRR test at V
S
=
±15V.
For the other voltages, this parameter is guaranteed by design and through
correlation with the
±15V
test. See the Applications Information section to
determine the valid input voltage range under various operating
conditions.
Note 8:
Offset voltage, offset voltage drift and PSRR are defined as
referred to the internal op amp. You can calculate output offset as follows.
In the case of balanced source resistance, V
OS,OUT
= V
OS
• NOISEGAIN +
I
OS
• 450k + I
B
• 450k • (1– R
P
/R
N
) where R
P
and R
N
are the total
resistance at the op amp positive and negative terminal respectively.
Note 9:
Applies to resistors that are connected to the inverting inputs.
Resistor matching is not tested directly, but is guaranteed by the gain
error test.
Note 10:
Input impedence is tested by a combination of direct
measurements and correlation to the CMRR and gain error tests.
微软的图形化编程教育平台MakeCode 开始支持 ESP32 和 ESP32-S2了。
https://github.com/microsoft/pxt-maker/commit/79408a320fd15c3472639fdfbfa80c57ea2f20ff
add support f ......
嵌入式系统
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