Tai-1 Microelectronics
www.taimec.com.tw
Preliminary
TMPA2156D2
Rev.1.0
September 7, 2005
0.73W/CH STEREO CLASS-D AUDIO POWER AMPLIFIER
GENERAL DESCRIPTION
The TMPA2156D2 is a STEREO class-D audio power amplifier
IC. With SE(Single-Ended) configuration, it delivers up to
0.73W/CH power into a 3 ohms load or 0.6W/CH power into a 4
ohm load or 0.33W/CH power into an 8 ohm load. No external
heat-sink is required.
♦
Up to 85% Power Efficiency
♦
Automatic output power control (APC)
♦
2.2mA Quiescent Current at 5V
For multiple-input applications, independent gain control and
corner frequency can be implemented by summing the input
sources through resistor ratio and input capacitor values.
Automatic voltage gain control makes the best use of battery.
♦
Less Than 0.2uA Shutdown Current
♦
Popless Power-Up, Shutdown and Recovery
♦
Single-Ended output
♦
Thermal Shutoff and Automatic Recovery
♦
Short-Circuit Protection
Analog input signal is converted into digital output which drives
directly to the speaker. High power efficiency is achieved due to
digital output at the load. The audio information is embedded in
PWM(Pulse Width Modulation).
TSSOP8, SOP8 Available
♦
FEATURES
♦
2.5V to 6V Single Supply
♦
Up to 0.73W/CH at 5V, 3 ohms
Package
APPLICATIONS
Multimedia application includes Cellular Phones, PDAs, 2.1
channel, USB audio. It is also ideal for other portable devices
like Wireless Radios.
For best performance, please refer to
//www.taimec.com.tw/data/Tmpa2155EVM/tmpa2156d2EVM.pdf
for PCB layout.
REFERENCE CIRCUIT
Copyright
©2005,
Tai-1 Microelectronics Corp.
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Preliminary
TMPA2156D2
Rev.1.0
September 7, 2005
TOP VIEW
(Please
email david@taimec.com.tw for complete datasheet.)
Tai-1 Microelectronics reserves the right to make corrections, modifications, enhancements, improvements, and other changes
to its products and services at any time and to discontinue any product or service without notice. Customers are responsible
for their products and applications using Tai-1 Microelectronics components.
Note that the external components or PCB layout should be designed not to generate abnormal
voltages to the chip to prevent from latch up which may cause damage to the device.
Typical Application
C3
C7
C4
R2
100
JP1
J1
VI2
PHONEJACK STEREO
VI1
0.47uF
0.47uF
R4
R5
22k
22k
1
2
3
4
VO1
GND
IN1
IN2
1uF
10uF
+
1uF
L1
33uH
L2
Vo2 8
VDD7
VDDA
6
SDNB
5
VDDA
R3
SDNB
33uH
100
R6
100K
S1
switch
C6
1uF
C5
1uF
VDD
VDD
R7
3k
R13
3k
+
C8
1000uF
+
C9
1000uF
VO2
VO1
C1
C2
R8
3k
R9
3k
2156D2
R1
100
C10
+
100uF
VDD
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range unless otherwise noted(1)
Supply voltage, V
DD
Input voltage, V
I
Continuous total power dissipation
Operating free-air temperature, T
A
Operating junction temperature, T
J
Storage temperature, T
stg
In normal mode
In shutdown mode
-0.3V to 6V
-0.3V to 7V
-0.3V to V
DD
+0.3V
V
V
V
See package dissipation ratings
。
-20 to 85
C
-20 to 150
-40 to 150
。
C
。
C
(1) Stresses beyond those listed under”absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under
“recommended
operating conditions
“is
not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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©2005,
Tai-1 Microelectronics Corp.
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Preliminary
TMPA2156D2
Rev.1.0
September 7, 2005
RECOMMENDED OPERATING CONDITONS
MIN
Supply voltage, V
DD
High-level input voltage, V
IH
Low-level input voltage, V
IL
Operating free-air temperature, T
A
SDNB
SDNB
2.5
2
0
-20
NOM
MAX
6
V
DD
0.8
85
UNIT
V
V
V
。
C
PACKAGE DISSIPATION RATINGS
PACKGE
SOP8
DERATING
FACTOR
6.39mW/
。
C
C
T
A
≤
25
。
POWER RATING
0.799W
T
A
= 70
。
C
POWER RATING
0.511W
T
A
= 85
。
C
POWER RATING
0.415W
ELECTRICAL CHARACTERISTICS
T
A
=25
。
(unless otherwise noted)
C
PARAMETER
PSRR
CMRR
│I
IH
│
│I
IL
│
I
Q
I
Q
(SD)
rDS(on)
f(sw)
*Av
R
SDN
Z
I
Power supply rejection ratio
Common mode rejection ratio
High-level input current
Low-level input current
Quiescent current
Shutdown current
Static output resistance
Switching frequency
Voltage gain
Resistance from shutdown to GND
Input impedance
TEST CONDITIONS
V
DD
=V
DDA
=2.5V to 5.5V
V
DD
=V
DDA
=2.5V to 5.5V,
V
IC
=1Vpp, RL=8Ω
V
DD
=V
DDA
=5.5V, V
I
=5.8V (SDNB)
V
DD
=V
DDA
=5.5V, V
I
=-0.3V (SDNB)
V
DD
=V
DDA
=5V, no load
V
(
SDNB
)
=0.8V,
V
DD
=V
DDA
=2.5V to 5.5V
V
DD
=V
DDA
=5.5V
V
DD
=V
DDA
=2.5V to 5.5V
V
DD
=V
DDA
=2.5V to 5.5V, RL=8Ω
V
(
SDNB
)
=5V
MIN
TYP
-75
-55
30
MAX
-55
-50
UNIT
dB
dB
μA
1
2.2
0.2
600
200
17
250
21
200
12
15
18
300
25
3
0.5
μA
mA
μA
mΩ
kHz
V/V
kΩ
kΩ
*The gain of the amplifier is determined by, for V
DD
=V
DDA
=2.5V to 5.5V
Gain
=
320kohms
Ri
+
15kohms
where Ri is the external serial resistance at the input pin.
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Preliminary
TMPA2156D2
Rev.1.0
September 7, 2005
OPERATING CHARACTERISTICS
T
A
=25
。
R
L
=8Ω
speaker (unless otherwise noted)
C,
PARAMETER
R
L
=8Ω
P
O
Output power/CH
R
L
=4Ω
R
L
=3Ω
V
DD
=V
DDA
=5V, P
O
=0.2W, R
L=
8Ω, f=1kHz
THD+N
Total harmonic distortion plus noise
V
DD
=V
DDA
=5V, P
O
=0.3W, R
L=
4Ω, f=1kHz
V
DD
=V
DDA
=5V, P
O
=0.4W, R
L=
3Ω, f=1kHz
SNR
Crosstalk
Signal-to-noise ratio
Crosstalk between outputs
V
DD
=V
DDA
=5V, P
O
=1W, R
L=
8Ω
V
DD
=AV
DD
=5V, P
O
=1W R
L
=8Ω
V
DD
=V
DDA
=5V.
THD+N=10%,f=1kHz.
TEST CONDITIONS
MIN TYP MAX
0.33
0.6
0.73
0.55
0.55
0.64
85
-60
UNIT
W
%
dB
dB
TERMINAL FUNCTIONS
TERMINAL
I/O
NAME
GND
IN2
IN1
SDNB
V
DD
V
DDA
V
O
1
V
O
2
PIN NO
2
4
3
5
7
6
1
8
I
I
I
I
I
I
O
O
Digital ground
Channel 2 input
Channel 1 input
Shutdown (active low logic)
Digital Power supply
Analog Power supply
Channel 1 output
Channel 2 output
DESCRIPTION
TYPICAL CHARACTERISTICS
Note 1. Input coupling 1µF capacitors are used for all measurements.
2. LC filter is used for THD+N measurement and power efficiency measurement.
3. Characteristic frequency of the LC filter is set 41KHz unless otherwise specified.
Copyright
©2005,
Tai-1 Microelectronics Corp.
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Preliminary
TMPA2156D2
Rev.1.0
September 7, 2005
APPLICATION INFORMATION
Copyright
©2005,
Tai-1 Microelectronics Corp.
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