PA91
PA91
PA91
DESCRIPTION
The PA91 is a high voltage, low quiescent current MOS-
FET operational amplifier designed as a low cost solu-
tion for driving continuous output currents up to 200mA
and pulse currents up to 350mA. The safe operating
area (SOA) has no second breakdown limitations and
can be observed for all type loads by choosing an ap-
propriate current limiting resistor. The MOSFET output
stage is biased AB for linear operation. External com-
pensation provides flexibility in choosing bandwidth
and slew rate for the application. Apex Microtechnol-
ogy’s Power SIP package uses a minimum of board
space allowing for high density circuit boards. The 12-
pin PowerSIP package is electrically isolated.
High Voltage Power Operational Amplifiers
FEATURES
♦ HIGH VOLTAGE — 450V (±225V)
♦ LOW QUIESCENT CURRENT — 10mA
♦ HIGH OUTPUT CURRENT — 200mA
♦ PROGRAMMABLE CURRENT LIMIT
♦ HIGH SLEW RATE — 300V/µs
APPLICATIONS
♦ PIEZOELECTRIC POSITIONING
♦ HIGH VOLTAGE INSTRUMENTATION
♦ ELECTROSTATIC TRANSDUCERS
♦ PROGRAMMABLE POWER SUPPLIES UP
TO 440V
12
11
+V
S
EQUIVALENT SCHEMATIC
R1 R2
C1
R3
Q1
Q6
Q5
Q14A
1
–IN
R5
R8
2
+IN
Q15
R11
Q2
5
CC2
Q3
R4
Q4
ILIM
9
4
CC1
Q14B
R6
R9
Q8
Q11
R7
10
6
OUT
Q12
3
I
Q
Q16
Q13
R10
Q17
–V
S
7
8
R12
EXTERNAL CONNECTIONS
1
2
3
Rc
–IN
+IN
4
5
Cc
R
CL
6
7
8
9
10
11
12
*
I
Q
TO LOAD
AND FEEDBACK
–Vs
+Vs
*
Formed leads available
See package style EE
12-pin SIP
PACKAGE
STYLE DP
(See text.)
* Bypassing required.
www.apexanalog.com
PA91U
Copyright © Apex Microtechnology, Inc. 2012
(All Rights Reserved)
OCT 2012
1
PA91U REVM
PA91
1. CHARACTERISTICS AND SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Parameter
SUPPLY VOLTAGE, +V
S
to -V
S
OUTPUT CURRENT, source, sink, peak, within SOA
POWER DISSIPATION, continuous @ T
C
= 25°C
INPUT VOLTAGE, differential
INPUT VOLTAGE, common mode
TEMPERATURE, pin solder, 10s max.
TEMPERATURE, junction (Note 2)
TEMPERATURE RANGE, storage
OPERATING TEMPERATURE, case
−55
−40
-20
-V
S
Symbol
Min
Max
450
350
30
20
V
S
260
150
125
85
Units
V
mA
W
V
V
°C
°C
°C
°C
CAUTION
SPECIFICATIONS
INPUT
OFFSET VOLTAGE, initial
The PA91 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The exposed substrate contains beryllia (BeO). Do not crush, machine, or subject to temperatures
in excess of 850°C to avoid generating toxic fumes.
Test Conditions
1
Min
Typ
0.5
Full temperature range
15
10
75
200
4
50
10
11
4
±V
S
Ŧ 15
V
CM
= ±90V
100KHz bandwidth,
R
S
= 1KΩ, C
C
= OPEN
R
L
= 2KΩ, C
C
= OPEN
R
L
= 2KΩ, C
C
= OPEN
R
L
= 2KΩ, C
C
= OPEN
Full temperature range
±V
S
Ŧ 12
200
C
C
= OPEN
Full temperature range
240
470
300
94
80
98
1
500
2000
Parameter
Max
2
50
25
Units
mV
µV/°C
µV/V
µV/KHz
pA
pA/V
pA
Ω
pF
V
dB
µV RMS
OFFSET VOLTAGE vs. temperature
OFFSET VOLTAGE vs. supply
OFFSET VOLTAGE vs. time
BIAS CURRENT, initial
BIAS CURRENT vs. supply
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
COMMON MODE VOLTAGE RANGE
(Note 3)
COMMON MODE REJECTION, DC
NOISE
GAIN
OPEN LOOP @ 15Hz
GAIN BANDWIDTH PRODUCT @ 1MHz
POWER BANDWIDTH
PHASE MARGIN
OUTPUT
111
100
470
60
±V
S
Ŧ 10
dB
MHz
KHz
°
V
mA
V/µS
pF
VOLTAGE SWING (Note 3) I
O
= 200mA
CURRENT, continuous
SLEW RATE, A
V
= 100
CAPACITIVE LOAD, A
V
= +1
2
PA91U
PA91
Parameter
SETTLING TIME to 0.1%
RESISTANCE, no load
POWER SUPPLY
VOLTAGE (Note 5)
CURRENT, quiescent
THERMAL
RESISTANCE, AC, junction to case (Note 4) Full temp range, F > 60Hz
RESISTANCE, DC, junction to case
RESISTANCE, junction to air
TEMPERATURE RANGE, case
Full temp range, F < 60Hz
Full temp range
Meets full range specifications
-25
30
+85
2.5
4.2
°C/W
°C/W
°C/W
°C
±40
±150
10
±225
14
V
mA
Test Conditions
1
C
C
= OPEN, 2V step
Min
Typ
1
50
Max
Units
µS
Ω
NOTES: 1. (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Condi-
tions. Typical performance characteristics and specifications are derived from measurements taken
at typical supply voltages and T
C
= 25°C).
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate
power dissipation to achieve high MTTF.
3. +V
S
and –V
S
denote the positive and negative power supply rail respectively.
4. Rating applies if the output current alternates between both output transistors at a rate faster than
60Hz.
5. Derate max supply rating 0.625 V/°C below 25°C case. No derating needed above 25°C case.
TYPICAL PERFORMANCE GRAPHS
INTERNAL POWER DISSIPATION, P(W)
90
NORMALIZED QUIESCENT CURRENT, I
Q
(X)
40
32
24
16
8
0
POWER DERATING
PHASE RESPONSE
NORMALIZED QUIES. CURRENT
1.3
PHASE, Ф (°)
OUTPUT STAGE
135
1.2
180
C
C
= 68 pF
C
C
= 10 pF
C
C
= 4.7 pF
C
C
= OPEN
1M
10M
FREQUENCY F (Hz)
1.1
225
0
25
50
75 100 125 150
CASE TEMPERATURE, T
C
(°C)
270
100k
1.0
25
50
100
75
125
CASE TEMPERATURE, T
C
(°C)
SMALL SIGNAL RESPONSE
50
OPEN LOOP GAIN, A (dB)
VOLTAGE DROP FROM SUPPLY, V
S
– V
O
(V)
6
5.5
5
4.5
4
3.5
OUTPUT VOLTAGE SWING
OUTPUT VOLTAGE, V
O
(V
P-P
)
500
400
300
POWER RESPONSE
40
30
20
10
C
C
=
200
C
C
=
68p
F
C
C
=
OPE
C
C
=
10p
F
4.7p
N
F
C
C
= 68 pF
0 C
C
= 10 pF
C
C
= 4.7 pF
–10 C
C
= OPEN
100K
1M
10M
FREQUENCY, F (Hz)
0
0.1
.05
0.15
OUTPUT CURRENT, I
O
(A)
0.2
100
90
80
70
60
50
10K
100K
1M
FREQUENCY, F (Hz)
(V/μS)
N, (%)
300
200
R
L
= 1KΩ
V
S
= 200V
A
V
= 63
.1
GE, V (nV√Hz)
1K
700
PA91U
500
SLEW RATE
1
HARMONIC DISTORTION
20
15
10
INPUT NOISE VOLTAGE
3
OPEN LOOP GAIN
VOLTAGE DROP FROM SUP
30
20
10
C
OUTPUT VOLTAG
5
4.5
4
3.5
200
C
C
=
F
68p
=O
C
C
=
C
C
=
F
10p
P EN
F
4.7p
PA91
C
C
= 68 pF
0 C
C
= 10 pF
C
C
= 4.7 pF
–10 C
C
= OPEN
100K
1M
10M
FREQUENCY, F (Hz)
0
0.1
.05
0.15
OUTPUT CURRENT, I
O
(A)
0.2
100
90
80
70
60
50
10K
100K
1M
FREQUENCY, F (Hz)
SLEW RATE, (V/μS)
DISTORTION, (%)
300
200
100
70
50
40
30
20
10
0.1
10
100
1
EXT. COMPENSATION CAPACITOR, C
C
(pF)
R
L
= 1KΩ
V
S
= 200V
A
V
= 63
.1
P
O
= 17.6W
.01
P
O
= 1W
P
O
= 5W
INPUT NOISE VOLTAGE, V (nV√Hz)
1K
700
500
SLEW RATE
1
HARMONIC DISTORTION
20
15
10
7
5
INPUT NOISE VOLTAGE
3
2
10
.001
10
100
1K
10K
FREQUENCY, F (Hz)
100K
100
1K
10K
FREQUENCY, F (Hz)
100K
CURRENT LIMIT
.2
CURRENT LIMIT, I
LIM
(A)
.15
PHASE COMPENSATION
GAIN
≥1
≥5
≥10
≥30
C
C
*
68pF
10pF
4.7pF
NONE
R
C
100Ω
100Ω
0Ω
0Ω
.1
.05
0
*C
C
To be rated for the full supply voltage +V
S
to –V
S
.
Use NPO ceramic (COG) type.
0
8
12
24
4
16 20
RESISTOR VALUE, R
CL
(Ω)
TYPICAL APPLICATION
R
F
+V
S
LOW POWER, PIEZOELECTRIC POSITIONING
Piezo positioning may be applied to the focusing of seg-
mented mirror systems. The composite mirror may be
composed of hundreds of elements, each requiring focus-
ing under computer control. In such complex systems the
PA91 reduces the costs of power supplies and cooling
with its advantages of low cost and low quiescent power
consumption while increasing circuit density with the SIP
package.
R
IN
1
11,12
PIEZO DRIVE
PA91
6
V
OUT
2
COMPUTER
FOCUS
COMMAND
VOLTAGE
7,8
9,10
R
CL
GENERAL
–V
S
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexanalog.com for design
tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink
selection; Apex Microtechnology’s complete Application Notes library; Technical Seminar Workbook; and Evalua-
tion Kits.
CURRENT LIMIT
For proper operation, the current limit resistor (R
CL
) must be connected as shown in the external connection dia-
gram. For optimum reliability the resistor value should be set as high as possible. The value is calculated as follows;
with the maximum practical value of 32 ohms.
.65
R
CL
=
I
LIM
4
PA91U
PA91
SAFE OPERATING AREA (SOA)
SOA
500
300
200
OUTPUT CURRENT FROM +V
S
OR -V
S
(mA)
The MOSFET output stage of this power operational
amplifier has two distinct limitations:
1. The current handling capability of the MOSFET ge-
ometry and the wire bonds.
2. The junction temperature of the output MOSFETs.
NOTE: The output stage is protected against transient
flyback. However, for protection against sustained, high
energy flyback, external fast-recovery diodes should be
used.
20
0m
S
DC
10
0m
S
100
,T
DC
DC
C
=
,T
25
C
=
°C
SAFE OPERATING CURVES
85
50
30
20
,T
°C
The safe operating area curves define the maximum
additional internal power dissipation the amplifier can
tolerate when it produces the necessary output to drive
an external load.
C
=
12
5°
C
INPUT PROTECTION
PULSE CURVES @ 10% DUTY CYCLE MAX.
10
Although the PA91 can withstand differential voltages
25
75 100 125
250
500
50
up to ±20V, additional external protection is recom-
SUPPLY TO OUTPUT DIFFERENTIAL, V
S
- V
O
(V)
mended. Low leakage, low capacitance JFETs con-
nected as diodes are recommended (e.g. 2N4416, Q1-Q4 in Figure
+V
S
2). The differential input voltage will be clamped to ±1.4V. This is
Z1
sufficient overdrive to produce maximum power bandwidth.
POWER SUPPLY PROTECTION
Unidirectional zener diode transient suppressors are recommended
Q1
Q3
6
as protection on the supply pins. See Figure 2. The zeners clamp
PA91
transients to voltages within the power supply rating and also clamp
Q2
Q4
power supply reversals to ground. Whether the zeners are used or
+IN
7, 8
2
not, the system power supply should be evaluated for transient per-
formance including power-on overshoot and power-off polarity rever-
Z2
FIGURE 2.
sals as well as line regulation.
OVERVOLTAGE
–V
S
Conditions which can cause open circuits or polarity reversals on
PROTECTION
either power supply rail should be avoided or protected against. Re-
versals or opens on the negative supply rail is known to induce input stage failure. Unidirectional transzorbs prevent
this, and it is desirable that they be both electrically and physically as close to the amplifier as possible.
–IN
1
11, 12
STABILITY
The PA91 is externally compensated and performance can be tailored to the application. Use the graphs of small
signal response and power response as a guide. The compensation capacitor CC must be rated at 500V working
voltage. An NPO capacitor is recommended. The compensation network CCRC must be mounted closely to the
amplifier pins 4 and 5 to avoid spurious oscillation.
QUIESCENT CURRENT REDUCTION
When pin 3 (IQ) is shorted to pin 5 (CC2) the AB biasing of the output stage is disabled. This raises distortion since
the output stage is then class C biased, but reduces the quiescent current by 1mA for a power dissipation savings
of 0.4W. Pin 3 may be left open if not used.
PA91U
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
