INTEGRATED CIRCUITS
CBT6810
10-bit bus switch with precharged outputs
and Schottky undershoot protection for
live insertion
Product data
Supersedes data of 2000 Jun 19
2002 Dec 13
Philips
Semiconductors
Philips Semiconductors
Product data
10-bit bus switch with precharged outputs
and Schottky undershoot protection for live insertion
CBT6810
FEATURES
DESCRIPTION
The CBT6810 provides ten bits of high-speed TTL-compatible bus
switching. The low on-state resistance of the switch allows
bi-directional connections to be made while adding near-zero
propagation delay. The device also precharges the B port to a
user-selectable bias voltage (BIASV) to minimize live-insertion
noise.
The CBT6810 is organized as one 10-bit switch with a single enable
(OE) input. When OE is low, the switch is on and port A is
connected to port B. When OE is high, the switch between port A
and port B is open and the B port is precharged to BIASV through
the equivalent of a 10-kΩ resistor.
The CBT6810 is characterized for operation from -40 to +85
°C.
•
5
Ω
switch connection between port A and port B
•
TTL compatible input and output levels
•
Undershoot protection included to prevent shoot through level
changes
•
Bias voltage pre-charges the outputs to minimize signal distortion
during live insertion
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
IO
PARAMETER
Propagation delay
An to Bn or Bn to An
Input capacitance
Input/output capacitance
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF; V
CC
= 5 V
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V or V
CC
TYPICAL
250
3.5
9.0
UNIT
ps
pF
pF
ORDERING INFORMATION
PACKAGES
24-Pin Plastic TSSOP
24-Pin Plastic SSOP (QSOP)
TEMPERATURE RANGE
-40 to +85
°C
-40 to +85
°C
ORDER CODE
CBT6810PW
CBT6810DK
DWG NUMBER
SOT355-1
SOT556-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
1
SYMBOL
OE
BIASV
A1-A10
B1-B10
GND
V
CC
NAME AND FUNCTION
Output enable
Precharge bias voltage input
A - port side
B - port side with active pullup
Ground (V)
Positive supply voltagem
OE
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
B1
B2
B3
B4
13
2, 3, 4, 5, 6,
7, 8, 9, 10, 11
23, 22, 21, 20, 19,
18, 17, 16, 15, 14
12
B5
B6
B7
B8
B9
B10
BIASV
24
SA00505
2002 Dec 13
2
Philips Semiconductors
Product data
10-bit bus switch with precharged outputs
and Schottky undershoot protection for live insertion
CBT6810
LOGIC SYMBOL
FUNCTION TABLE
OE
L
BIASV
STATE
A port = B port
A port = Z
B port = BIASV
H
H
A1
B1
H = High voltage level
L = Low voltage level
Z = High impedance “off” state
A10
B10
CE
SA00531
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
SW
T
stg
BIASV
Θ
JA
PARAMETER
DC supply voltage
DC clamp diode current
DC input voltage
3
DC continuous channel current
Storage temperature range
DC Bias voltage range
Power dissipation per package
Plastic thin shrink small outline package
CONDITIONS
RATING
-0.5 to +7.0
-50
-0.5 to +7.0
±
128
-65 to 150
-0.5 to 7.0
134
UNIT
V
mA
V
mA
°C
V
°C/W
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2002 Dec 13
3
Philips Semiconductors
Product data
10-bit bus switch with precharged outputs
and Schottky undershoot protection for live insertion
CBT6810
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
BIASV
V
IH
V
IL
T
amb
DC supply voltage
DC supply voltage
High-level input voltage (control pin)
Low-level Input voltage (control pin)
Operating free-air temperature range
PARAMETER
Min
4.0
1.3
2.0
—
-40
Max
5.5
V
CC
—
0.8
+85
V
V
V
V
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= -40 to +85
°C
Min
V
IK
I
I
I
O
I
CC
∆I
CC
C
I
C
O(OFF)
r
on3
V
P
I
USP4
Input clamp voltage
Input leakage current (control pin)
Output bias current (B pins)
Quiescent supply current
Control pins
2
Control pins
Terminal capacitance
V
CC
= 4.5 V; I
I
= -18 mA
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 4.5 V; BiasV = 2.4 V; V
O
= 0,
OE = V
CC
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5 V, one input at 3.4 V,
other inputs at V
CC
or GND
V
I
= 3 V or 0
V
O
= 3 V or 0; switch off
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
On-resistance
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= -15 mA
Pass voltage
Undershoot static current
protection
V
IN
= V
CC
= 5.0 V; I
out
= -100
µA
V
CC
= 5.0 V, BiasV = V
CC
I
B
= -5
µA,
V
B
≥
3 V
—
—
—
—
—
—
—
—
—
—
3.4
—
Typ
1
—
—
—
—
—
3.5
9.0
5
5
10
3.6
-10
Max
-1.2
±
5
-0.25
2.5
2.5
—
—
7
7
15
3.9
—
V
mA
Ω
V
µA
mA
mA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25°C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lowest voltage of the two (A or B) terminals.
4. Force I
USP
, measure V
B
≥
3 V
2002 Dec 13
4
Philips Semiconductors
Product data
10-bit bus switch with precharged outputs
and Schottky undershoot protection for live insertion
AC CHARACTERISTICS FOR V
CC
= 5.0
±0.5
V RANGE
GND = 0 V; t
r
= t
f
≤
2.5 ns; C
L
= 50 pF.
SYMBOL
t
pd
t
PZH
t
PZL
t
PHZ
t
PLZ
PARAMETER
Propagation delay An to Bn; Bn to An
2
3-State output enable time
OE to An; OE to Bn; BIASV = GND
3-State output enable time
OE to An; OE to Bn; BIASV = 3.0V
3-State output enable time
OE to An; OE to Bn; BIASV = GND
3-State output enable time
OE to An; OE to Bn; BIASV = 3.0V
WAVEFORM
1
2
2
2
2
CBT6810
LIMITS
T
amb
= -40 to +85°C
MIN
TYP
1
MAX
0.25
1.8
2.1
1.7
1.0
3.5
4.2
3.7
5.5
5.3
7.2
6.1
7.3
UNIT
ns
ns
ns
ns
ns
NOTE:
1. All typical values are measured at T
amb
= 25
°C
and V
CC
= 5.0 V
2. Warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON-state resistance of the
switch and a load capacitance of 50pF, when driven by an ideal voltage source (zero output impedance)
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
3V
1.5V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5V
OUTPUT
V
OL
SA00028
1.5V
1.5V
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
Waveform 1. Waveforms Showing the Input (An) to Output (Yn)
Propagation Delays
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
3V
Output Control
(Low-level
enabling
t
PZL
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
1.5 V
1.5 V
0V
3.5V
1.5 V
t
PHZ
V
OH
- 0.3V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00029
SA00012
t
PLZ
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR
≤
10 MHz, Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per
measurement.
V
OL
+ 0.3V
V
OL
V
OH
Waveform 2. Waveforms Showing the 3-State Output Enable
and Disable Times
2002 Dec 13
5
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