M-991
I
NTEGRATED
C
IRCUITS
D
IVISION
Features
•
Generates standard call progress tones
•
Digital input control
•
Linear (analog) output
•
Power output capable of driving standard line
•
14-pin DIP and 16-pin SOIC package types
•
Single supply 5V CMOS (low power)
•
Inexpensive 3.58 MHz time base
•
Temperature range from -25ºC to 70ºC
Applications
•
•
•
•
•
Telephone Systems
Test Equipment
Callback
Security Systems
Billing Systems
Call Progress Tone Generator
Description
The M-991 is a call progress tone generator integrated
circuit for use in telephone systems. The circuit uses
low-power CMOS techniques to generate tones which
are digitally controlled and highly linear. The M-991 is
designed to permit operation with almost any system.
The use of integrated circuit techniques allows the
M-991 to incorporate the control, tone generating, and
power output buffer into a single 14-pin DIP or 16-pin
SOIC. A 3.58-MHz (color burst) crystal-controlled time
base guarantees accuracy and repeatability.
Ordering Information
Part #
M-991
M-991-01SM
M-991-01SMTR
Description
14-Pin Plastic DIP
16-Pin SOIC
16-Pin SOIC, Tape & Reel
Pin Configuration
Block Diagram
Pb
DS-M-991-R03
e
3
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NTEGRATED
C
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IVISION
Absolute Maximum Ratings
Parameter
V
DD
Any Input Voltage
Operating Ambient Temperature
Storage Temperature
Ratings
7
V
SS
-0.6 to V
DD
+0.6
-25 to +70
-55 to +125
Units
V
V
°C
°C
M-991
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the
operational sections of this data sheet is not implied.
Exposure of the device to the absolute maximum ratings
for an extended period may degrade the device and affect
its reliability.
Specifications
Parameter
Power Supply
and Reference
V
DD
Current Drain I
DD
V
REF
Pin:
Deviation From (V
DD
+V
SS
)/2
Internal Resistance From V
REF
to V
DD
, V
SS
Frequency Deviation
External Clock (XOUT Open)
V
IL
V
IH
Duty Cycle
XIN, XOUT Loading
Capacitance
Resistance
Frequency Deviation
Level
Distorting Components
Idle
OUTDRIVE Envelope Rise Time
DX, CE Pins:
V
IL
V
IH
Mute Pins:
V
OL
(I
SINK
= -100A)
V
OH
(I
SOURCE
= 100A)
Data Setup (t
DS
)
Data Hold (t
DH
)
Chip Enable Fall (t
PL
)
Turn On Delay (t
TO
)
Turn Off Delay (t
TD
)
Mute Delay from Outdrive (t
MO
)
Min
4.75
-
-2
3.25
-0.01
0
V
DD
- 0.2
40
-
20
-0.5
100
-35
-
-
-
2.5
-
V
DD
- 1.5
200
10
-
-
-
-
7
8
Typ
-
2/4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.25
-
+2
6.75
+0.01
0.2
V
DD
60
10
-
+0.5
180
-
-60
4
0.5
-
1.5
-
-
-
90
5
5
200
Units
V
mA
%
k
%
Notes
8
Oscillator
7
V
%
pF
M
%
mV
dB
dBm
ms
10
-
-
2
3
4
5
6
Tone Output
Control
V
V
ns
ns
ns
ms
ms
ns
11
Timing
Notes:
(Unless Otherwise Specified)
1
All DC voltages are referenced to V .
SS
2
V
rms
per tone, 540 load.
3
Any one frequency relative to the lowest level output tone (f<4000Hz)
4
0 dBm = 0.775V
rms
.
5
To 90% maximum amplitude.
6
For all supply voltages in the operating range.
At XOUT pin as compared to 3.579545MHz.
OUTDRIVE with load > 5 k/OUTDRIVE with 540 load.
9
Resistance at V
REF
to V
DD
or V
SS
> 1M.
10
Crystal oscillator active.
11
Measured 90% to 10%.
2
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NTEGRATED
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Call Progress Tone Generation
Call progress tones are audible tones sent from
switching systems to calling parties (or equipment) to
indicate the status of calls. Calling parties can identify
the success of a placed call by what is heard after
dialing. The M-991 series utilizes a highly linear tone
generator that produces the unique frequencies (singly
or in pairs) that are common to call progress signals.
Duration and frequency selection are digitally
controlled (see the Data/Tone Selection table below for
data settings for a particular tone output). A typical
control sequence for the M-991 is: (1) set data lines to
desired frequency selection, (2) wait for data lines to
settle, (3) drive the chip enable (CE) low, (4) maintain
CE low for desired tone duration (Note: data lines may
be changed after data hold time), and (4) return CE to
a logic high. (Commonly used call progress tones are
Data/Tone Selection
D3
0
0
0
0
0
0
0
0
1
1
D2
0
0
0
0
1
1
1
1
0
0
D1
0
0
1
1
0
0
1
1
0
0
D0
0
1
0
1
0
1
0
1
0
1
Frequency (Hz)
1
300
400
440
440
440
480
480
350
620
941
2
440
off
off
480
620
off
620
off
off
1209
Use
Dial Tone
Special
Alert Tone
Audible Ring
Pre-empt
Bell high tone
Reorder (Bell low)
Special
Special
DTMF " * "
M-991
shown in the Data/Tone Selection table below.) In a
bus-oriented system, noise on the data lines may
propagate through the device and appear at the
output. To safeguard against this, use an external latch
to lock the data into the device. In addition, it is good
practice to bypass the V
REF
pin to ground with a
small capacitor (0.01F) to reduce power supply
noise. The designer should be aware of device timing
requirements and design accordingly. The data input
pins may be tied high (+5 VDC) or low (ground) as
required, but D4 and D5 must be left open. Beware of
hardwiring the CE pin for dedicated tone generation.
This input is edge triggered. An RC network like that
shown in the Power-on Reset Circuit on Page 4 should
be used to momentarily reset the device immediately
following power-up to ensure proper operation.
Pin Function
Pin
CE
D0 - D3
D4 - D5
Function
Latches data and enables output (active low input)
Data input pins (See Data/Tone Selection)
Leave open
Output indicates that a signal is being generated at
MUTE
OUTDRIVE.
OUTDRIVE Linear buffered tone output.
V
DD
Most positive power supply input pin.
V
REF
Internally generated mid-power supply voltage (output).
V
SS
Most negative power supply input pin.
X
IN
Crystal oscillator or digital clock input.
Crystal oscillator output.
X
OUT
Standard Call Progress Tones
Tone Name
Dial
Reorder
Busy
Audible Ring
Recall Dial
Special AR
Intercept
Call Waiting
Busy Verification
Executive Override
Confirmation
Frequency (Hz)
1
2
350
440
480
620
480
620
440
480
350
440
440
480
440
620
440
off
440
440
350
off
off
440
Interruption Rate
Steady
Repeat, tones on and off 250 ms ± 25 ms each.
Repeat, tones on and off 500 ms ± 50 ms each.
Repeat, tones on 2 ± 0.2 s, tones off 4 ± 0.4 s
Three bursts tones on and off 100 ms ± 20 ms each followed by dial tone.
Tones on 1 ± 0.2s, followed by single 440 Hz on for 0.2s on, and silence for 3 ± 0.3 s, repeat.
Repeat alternating tones, each on for 230 ms ± 70 ms with total cycle of 500 ± 50 ms.
One burst 200 ± 100 ms
One burst of tone on 1.75 ± 0.25 s before attendant intrudes, followed by burst of tone 0.65 ± 0.15 s on, 8 to
20 s apart for as long as the call lasts
One burst of tone for 3 ± 1 s before overriding station intrudes
Three bursts on and off 100 ms each or 100 ms on, 100 ms off, 300 ms on
R03
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NTEGRATED
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IVISION
Mechanical Dimensions
14-Pin DIP
M-991
Tolerances
Inches
Dimensions
mm
(inches)
A
A1
b
b2
C
D
E
E1
e
ec
L
Min
Max
-
0.210
0.15
-
0.014
0.022
0.045
0.070
0.008
0.014
0.735
0.775
0.300
0.325
0.240
0.280
0.100 BSC
0º
15º
0.115
0.150
Metric (mm)
Min
Max
-
5.33
0.38
-
0.36
0.56
1.1
1.8
0.20
0.36
18.7
19.7
7.6
8.3
6.1
7.1
2.54 BSC
0º
15º
2.9
4.1
16-Pin SOIC
Dimensions
mm
(inches)
A
A1
b
D
E
e
H
L
Tolerances
Inches
Min
Max
0.0926
0.1043
0.0040
0.0118
0.013
0.020
0.3977
0.4133
0.2914
0.2992
0.050 BSC
0.394
0.419
0.016
0.050
Metric (mm)
Min
Max
2.35
2.65
0.10
0.30
0.33
0.51
10.10
10.50
7.4
7.6
1.27 BSC
10.00
10.65
0.40
1.27
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to
its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-M-991-R03
©Copyright 2012, IXYS Integrated Circuits Division
OptoMOS® is a registered trademark of IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
12/22/2012
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